M54/74HC292/7292

Features:

.HIGHSPEED  f_MAX=70MHz(TYP.)atV_CC=5V
.LOW POWER DISSIPATION  I_CC=4mA(MAX.)atT_A=25oC
.HIGH NOISE IMMUNITY  V_NIH=V_NIL=28%VCC(MIN.)
.OUT PUT DRIVE CAPABILITY 10LSTTLLOADS
.SYMMETRICAL OUT PUT IMPEDANCE  |I_OH|=I_OL=4mA(MIN.)
.BALANCEDPROPAGATIONDELAYS   t_PLH=t_PHL
.WIDEOPERATINGVOLTAGERANGE  V_CC(OPR)=2VTO6V
.PIN AND FUNCTION COMPATIBLE WITH54/74LS292/294


Pinout




Specifications

Symbol	Parameter	Value	Unit
VCC	Supply Voltage	-0.5 to +7	V
VI	DC Input Voltage	-0.5 to VCC + 0.5	V
VO	DC Output Voltage	-0.5 to VCC + 0.5	V
IIK	DC Input Diode Current	± 20	mA
IOK	DC Output Diode Current	± 20	mA
IO	DC Output Source Sink Current Per Output Pin	± 25	mA
ICC or IGND	DC VCC or Ground Current	± 50	mA
PD	Power Dissipation	500 (*)	mW
Tstg	Storage Temperature	-65 to +150	oC
TL	Lead Temperature (10 sec)	300	oC

Description

  The 54/74HC292/7292 and HC294/7294 are high speedCMOS PROGRAMMABLE DIVIDER/TIMER fabricated with silicon C2MOS technology.

  54/74HC292/7292 and HC294/7294 achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

  These devices 54/74HC292/7292 and HC294/7294 are programmable frequency dividers. The typeshave two clock inputs, either one may be used for clock gating. (see the function table). The HC292/7292 can divide from 22 to 231,and the HC294/7294 can divide from 22 to 215. The types feature an active-low clear input to initialize the state of all flip-flops. To facilitate incoming inspection, test points are provided. (TP1, TP2 and TP3 on the HC292/7292 and TP on the HC294/7294). All inputs are equipped with protection circuits against static discharge and transient excess voltage.HC292/294 have Q output with "Totem pole"configuration and test point TP with "Open Drain"output configuration. HC7292/7294 have all outputs "Totem Pole".