Features: ` Multi-Chip Package 1 die of 128 Mbit (8Mb x16, Mux I/O Multiple Bank, Multi-level, Burst) Flash Memory 1 die of 32 or 64Mbit Mux I/O, Burst Pseudo SRAM` Supply voltage VDDF = VDDP = VDDQF = 1.7 to 1.95V VPPF = 9V for fast program` Electronic signature Manufacturer Code: 20h Devic...
M36L0R7050L1: Features: ` Multi-Chip Package 1 die of 128 Mbit (8Mb x16, Mux I/O Multiple Bank, Multi-level, Burst) Flash Memory 1 die of 32 or 64Mbit Mux I/O, Burst Pseudo SRAM` Supply voltage VDDF = VDDP = V...
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Features: MULTI-CHIP PACKAGE 1 die of 128 Mbit (8Mb x16, Multiple Bank, Multi-level, Burst) Flash...
Features: MULTI-CHIP PACKAGE 1 die of 128 Mbit (8Mb x16, Multiple Bank, Multi-level, Burst) Flash...
Features: ` MULTI-CHIP PACKAGE 1 die of 128 Mbit (8Mb x16, Multiple Bank, Multi-level, Burst) Fla...
Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.
Symbol | Parameter |
Value |
Unit | |
Min |
Max | |||
TA | Ambient Operating Temperature |
-25 |
85 |
|
TBIAS | Temperature Under Bias |
-25 |
85 |
|
TSTG | Storage Temperature |
-55 |
125 |
|
VIO | Input or Output Voltage |
-0.2 |
2.45 |
V |
VDDF,VDDQF,VCCP | Core and Input/Output Supply Voltages |
-0.2 |
2.45 |
V |
VPPF | Flash Program Voltage |
-0.2 |
10 |
V |
IO | Output Short Circuit Current |
100 |
mA | |
tVPPFH | Time for VPPF at VPPFH |
100 |
hours |
The M36L0R7060U1, M36L0R7060L1, M36L0R7050U1 and M36L0R7050L1 combine two memory devices in a Multi-Chip Package:
a 128-Mbit, Multiple Bank Flash memory, the M58LR128G(U/L)
a 32 or 64 Mbit PseudoSRAM, the M69KM048AA or M69KM096AA, respectively.
The purpose of this document is to describe how the two memory components operate with respect to each other. It must be read in conjunction with the M58LRxxxGUL and M69KM048AA or M69KM096AA datasheets, where all specifications required to operate the Flash memory and PSRAM components are fully detailed. These datasheets are available from the STMicroelectronics website: www.st.com.
Recommended operating conditions do not allow more than one memory to be active at the same time.
The memory of M36L0R7060U1, M36L0R7060L1, M36L0R7050U1 and M36L0R7050L1 is offered in a Stacked TFBGA88 (8 *10mm, 8 * 10 ball array, 0.8mm pitch) package.
In order to meet environmental requirements, ST M36L0R7060U1, M36L0R7060L1, M36L0R7050U1 and M36L0R7050L1 offers these devices in ECOPACK® packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect M36L0R7060U1, M36L0R7060L1, M36L0R7050U1 and M36L0R7050L1 is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97.
The maximum ratings of M36L0R7060U1, M36L0R7060L1, M36L0R7050U1 and M36L0R7050L1 related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications of M36L0R7060U1, M36L0R7060L1, M36L0R7050U1 and M36L0R7050L1 are available at: www.st.com.