Features: ` 1,572,864*16 bit organization` Access time: 120 ns (MAX.)` Supply current: Operating: 80 mA (MAX.) Standby: 100 A (MAX.)` TTL compatible I/O` Three-state output` Single +5 V Power supply` Static operation` When the address input at both A19 and A20 is high level, outputs become high ...
LH5324C00: Features: ` 1,572,864*16 bit organization` Access time: 120 ns (MAX.)` Supply current: Operating: 80 mA (MAX.) Standby: 100 A (MAX.)` TTL compatible I/O` Three-state output` Single +5 V Power supp...
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Features: ` 131,072 words*8 bit organization` Access times: 500 ns (MAX.) at 2.6 V VCC < 4.5 V ...
` 1,572,864*16 bit organization
` Access time: 120 ns (MAX.)
` Supply current:
Operating: 80 mA (MAX.)
Standby: 100 A (MAX.)
` TTL compatible I/O
` Three-state output
` Single +5 V Power supply
` Static operation
` When the address input at both A19 and A20 is high level, outputs become high impedance irrespective of CE or OE.
` Package:
42-pin, 600-mil DIP
` Others:
Non programmable
Not designed or rated as radiation hardened
CMOS process (P type silicon substrate)
PARAMETER | SYMBOL | RATING | UNIT |
Supply voltage | Vcc | 0.3 to +7.0 | V |
Input voltage |
VIN | 0.3 to VCC + 0.3 | V |
Output voltage |
VOUT |
0.3 to VCC + 0.3 |
V |
Operating temperature | Topr | 0 to +70 |
|
Storage temperature | Tstg | 65 to +150 |
The LH5324C00 is a 24M-bit mask-programmable ROM organized as 1,572,864×16 bits. It is fabricated using silicon-gate CMOS process technology.