ICS673-01

Features: • Packaged in 16 pin narrow SOIC• Access to VCO input and feedback paths of PLL• VCO operating range up to 135 MHz (5V)• Able to lock MHz range outputs to kHz range inputs through use of external dividers• Output Enable tri-states outputs• Low skew out...

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ICS673-01 Picture
SeekIC No. : 004370885 Detail

ICS673-01: Features: • Packaged in 16 pin narrow SOIC• Access to VCO input and feedback paths of PLL• VCO operating range up to 135 MHz (5V)• Able to lock MHz range outputs to kHz range...

floor Price/Ceiling Price

Part Number:
ICS673-01
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• Packaged in 16 pin narrow SOIC
• Access to VCO input and feedback paths of PLL
• VCO operating range up to 135 MHz (5V)
• Able to lock MHz range outputs to kHz range inputs through use of external dividers
• Output Enable tri-states outputs
• Low skew output clocks
• Power Down turns off chip
• VCO predivide of 1 or 4
• 25 mA output drive capability at TTL levels
• Advanced, low power, sub-micron CMOS process
• +3.3 V ±5% or +5 V ±10% operating voltage
• Industrial Temperature range available
• With the ICS674-01, forms a complete PLL



Pinout

  Connection Diagram


Specifications

Parameter Conditions Minimum Maximum Units
Supply voltage, VDD Referenced to GND   7 V
Inputs and Clock Outputs Referenced to GND -0.5 VDD+0.5 V
Ambient Operating Temperature ICS673M-01 0 70 °C
Ambient Operating Temperature ICS673M-01I -40 85 °C
Soldering Temperature Max of 20 seconds   260 °C
Storage temperature   -65 150 °C



Description

The ICS673-01 is a low cost, high performance Phase Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO), and two output buffers. One output buffer is a divide by two of the other. Through the use of external reference and VCO dividers (easily implemented with the ICS674-01), the user can easily customize the clock to lock to a wide variety of input frequencies.

Included on the ICS673-01 are an Output Enable function that puts both outputs into a highimpedance state, as well as a Power Down feature that turns off the entire device.




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