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ICS601-21

Features: • Fully integrated PLL, no external loop filter required• Differential 3.3 V LVPECL outputs• Uses fundamental 10 - 27 MHz crystal or clock• Output clocks up to 220 MHz at 3.3 V• Low phase noise: -122 dBc/Hz at 10 kHz• Low jitter - 15 ps one sigma typ.&...

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SeekIC No. : 004370837 Detail

ICS601-21: Features: • Fully integrated PLL, no external loop filter required• Differential 3.3 V LVPECL outputs• Uses fundamental 10 - 27 MHz crystal or clock• Output clocks up to 220 ...

ICS601-21 Data Sheet

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Part Number:
ICS601-21
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

• Fully integrated PLL, no external loop filter required
• Differential 3.3 V LVPECL outputs
• Uses fundamental 10 - 27 MHz crystal or clock
• Output clocks up to 220 MHz at 3.3 V
• Low phase noise: -122 dBc/Hz at 10 kHz
• Low jitter - 15 ps one sigma typ.
• Powerdown mode lowers power consumption
• Packaged in 16-pin TSSOP
• Advanced, low power, sub-micron CMOS process
• Operating voltage of 3.3 V
• Commercial temperature range available


Pinout

Connection Diagram


Specifications

Item Rating
Supply Voltage, VDD 7 V
All Inputs and Outputs -0.5 V to VDD+0.5 V
Ambient Operating Temperature, Commercial version 0 to +70
Storage Temperature -65 to +150
Junction Temperature 125
Soldering Temperature 260



Description

The ICS601-21 is a low-cost, low phase noise, high performance clock synthesizer for applications which require low phase noise and low jitter. It is ICS' lowest phase noise multiplier. Using ICS' patented analog and digital Phase Locked Loop (PLL) techniques, the chip accepts a 10 - 27 MHz crystal or clock input, and produces output clocks up to 220 MHz at 3.3 V.

This product of the ICS601-21 is intended for clock generation. It has low output jitter (variation in the output period), but input to output skew and jitter are not defined nor guaranteed.




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