Features: • Access time: 45, 70, 100 ns• Low active power: 70 mW• Low standby power- 60 W CMOS standby• Fully static operation: no clock or refresh required• TTL compatible inputs and outputs• Single 3.3V power supplyPinoutSpecifications Symbol Parameter...
IC62LV256: Features: • Access time: 45, 70, 100 ns• Low active power: 70 mW• Low standby power- 60 W CMOS standby• Fully static operation: no clock or refresh required• TTL compat...
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Features: • High-speed access time: 35, 45, 55, 70 ns• Low active power: 450 mW (typic...
Features: • Access times of 55, 70, 100 ns• CMOS Low power operation: ICC=15mA (typica...
Symbol |
Parameter |
Value |
Unit |
VTERM |
Terminal Voltage with Respect to GND |
0.5 to +4.6 |
V |
TBIAS |
Temperature Under Bias |
55 to +125 |
°C |
TSTG |
Storage Temperature |
65 to +150 |
°C |
PT |
Power Dissipation |
0.5 |
W |
IOUT |
DC Output Current (LOW) |
20 |
mA |
The ICSI IC62LV256 is a low power, 32, 768-word by 8-bit static RAM. It is fabricated using ICSI's high-performance CMOS double-metal technology.
When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation is reduced to 20 W (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW Chip Enable (CE) input and an active LOW Output Enable (OE) input. The active LOW Write Enable (WE) controls both writing and reading of the memory.
The IC62LV256 is pin compatible with other 32K x 8 SRAMs in 300mil DIP and SOJ, 330mil SOP, and 8*13.4mm TSOP-1 packages.