IC62LV12816DL

Features: • High-speed access times: 55, 70, 100 ns• CMOS low power operation--60mW (typical)* operating--3W (typical)* CMOS standby• TTL compatible interface levels• Single 2.7V-3.6V Vcc power supply• Fully static operation: no clock or refresh required• Three ...

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IC62LV12816DL Picture
SeekIC No. : 004370418 Detail

IC62LV12816DL: Features: • High-speed access times: 55, 70, 100 ns• CMOS low power operation--60mW (typical)* operating--3W (typical)* CMOS standby• TTL compatible interface levels• Single ...

floor Price/Ceiling Price

Part Number:
IC62LV12816DL
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/30

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Product Details

Description



Features:

• High-speed access times: 55, 70, 100 ns
• CMOS low power operation
--60mW (typical)* operating
--3W (typical)* CMOS standby
• TTL compatible interface levels
• Single 2.7V-3.6V Vcc power supply
• Fully static operation: no clock or refresh required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Available in the 44-pin TSOP-2 and 48-pin 6x8mm TF-BGA
• CE2 pin only for 48-pin TF-BGA.



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VTERM
Terminal Voltage with Respect to GND
0.5 to Vcc + 0.5
V
TBIAS
Temperature Under Bias
40 to +85
VCC
Vcc related to GND
0.3 to +4.0
V
TSTG
Storage Temperature
65 to +150
PT
Power Dissipation
1.0
W

Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other  onditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.




Description

The IC62LV12816DL are lowpower, 2,097,152 bit static RAMs organized as 131,072 words by 16 bits. They are fabricated using ICSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices.

When CE1 of the IC62LV12816DL is HIGH or when CE2 is low (deselected) or both LB and UB are HIGH, the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels.

Easy memory expansion is provided by using Chip Enable Output and Enable inputs, CE1, CE2 and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access.

The IC62LV12816DL are packaged in the JEDEC standare 44-pin TSOP-2 and 48-pin 6*8mm TFBGA.




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