HYMP564S648-E3/C4

Features: • JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply• All inputs and outputs are compatible with SSTL_1.8 interface• Posted CAS• Programmable CAS Latency 3 ,4 ,5• OCD (Off-Chip Driver Impedance Adjustment) and OD...

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HYMP564S648-E3/C4 Picture
SeekIC No. : 004369345 Detail

HYMP564S648-E3/C4: Features: • JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply• All inputs and outputs are compatible with SSTL_1.8 interface• Posted ...

floor Price/Ceiling Price

Part Number:
HYMP564S648-E3/C4
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply
• All inputs and outputs are compatible with SSTL_1.8 interface
• Posted CAS
• Programmable CAS Latency 3 ,4 ,5
• OCD (Off-Chip Driver Impedance Adjustment) and ODT (On-Die Termination)
• Fully differential clock operations (CK & CK)
• Programmable Burst Length 4 / 8 with both sequential and interleave mode
• Auto refresh and self refresh supported
• 8192 refresh cycles / 64ms
• Serial presence detect with EEPROM
• DDR2 SDRAM Package: 60ball(x8), 84ball(x16) FBGA
• 67.60 x 30.00 mm form factor
• Lead-free Products are RoHS compliant



Pinout

  Connection Diagram


Specifications

Parameter Symbol Value Unit Note
Voltage on VDD pin relative to Vss VDD - 1.0 V ~ 2.3 V V 1
Voltage on VDDQ pin relative to Vss VDDQ - 0.5 V ~ 2.3 V V 1
Voltage on any pin relative to Vss VIN, VOUT - 0.5 V ~ 2.3 V V 1
Storage Temperature TSTG -50 ~ +100 1
Storage Humidity(without condensation) HSTG 5 to 95 % 1

Notes:
1. Stress greater than those listed may cause permanent damage to the device. This is a stress rating only, and device functional operation at or above the conditions indicated is not implied. Expousure to absolute maximum rating con ditions for extended periods may affect reliablility.




Description

This Hynix unbuffered Slim Outline Dual In-Line Memory Module(DIMM) series of the HYMP564S648-E3/C4 consists of 512Mb 1st ver. DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 200pin glass-epoxy substrate. This Hynix 512Mb 1st ver. based Unbuffered DDR2 SO-DIMM series provide a high performance 8 byte interface in 67.60mm width form factor of industry standard. The HYMP564S648-E3/C4 is suitable for easy interchange and addition.




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