HYMP112S64(L)MP8

Features: • 1GB (128M x 64) Unbuffered DDR2 SO - DIMM based on 128Mx8 DDR2 DDP SDRAMs• JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply• All inputs and outputs are compatible with SSTL_1.8 interface• OCD (Off-Chip Driver Imped...

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SeekIC No. : 004369333 Detail

HYMP112S64(L)MP8: Features: • 1GB (128M x 64) Unbuffered DDR2 SO - DIMM based on 128Mx8 DDR2 DDP SDRAMs• JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply...

floor Price/Ceiling Price

Part Number:
HYMP112S64(L)MP8
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Features:

• 1GB (128M x 64) Unbuffered DDR2 SO - DIMM based on 128Mx8 DDR2 DDP SDRAMs
• JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply
• All inputs and outputs are compatible with SSTL_1.8 interface
• OCD (Off-Chip Driver Impedance Adjustment) and ODT (On-Die Termination)
• Fully differential clock operations (CK & /CK)
• Programmable CAS Latency 3 / 4 /5 supported
• Programmable Burst Length 4 / 8 with both sequential and interleave mode
• Auto refresh and self refresh supported
• 7.8us refresh period at Lower than TCASE 85, 3.9us( 85 < TCASE 95)
• Serial Presence Detect(SPD) with EEPROM
• Lead free product



Specifications

Parameter
Symbol
Value
Unit
Note
Operating temperature(ambient)
TOPR
0 ~ +55
oC
1
DRAM Component Case Temperature Range
TCASE
0 ~+95
oC
2
Operating Humidity(relative)
HOPR
10 to 90
%
1
Storage Temperature
TSTG
-50 ~ +100
oC
1
Storage Humidity(without condensation)
HSTG
5 to 95
oC
1
Barometric Pressure(operating & storage)
PBAR
105 to 69
K Pascal
1,3
Note :
1. Stresses greater than those listed may cause permanent damage to the device. This is a
stress rating only, and device functional operation at or above the conditions indicated is not
implied. Expousure to absolute maximum rating conditions for extended periods may affect
reliablility.
2. If the DRAM case temperature is Above 85oC, the Auto-Refresh command interval has to be
reduced to tREFI=3.9㎲.
For Measurement conditions of TCASE, please refer to the JEDEC document JESD51-2.
3. Up to 9850 ft.



Description

Hynix HYMP112S64(L)MP8 series is unbuffered 200-pin double data rate 2 Synchronous DRAM Small Outline Dual In-Line Memory Modules (DIMMs) which are organized as 128Mx64 high-speed memory arrays. Hynix HYMP112S64MP8 series consists of eight 128Mx8 DDR2 SDRAMs in 63 ball FBGA Dual Die Pacakge(DDP)s. Hynix HYMP112S64MP8 series provide a high performance 8-byte interface in 67.60mm X 30.00mm form factor of industry standard. It is suitable for easy interchange and addition.

Hynix HYMP112S64(L)MP8 series is designed for high speed and offers fully synchronous operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 4- bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_1.8. High speed frequencies, programmable latencies and burst lengths allow variety of device operation in high performance memory system.

Hynix HYMP112S64(L)MP8 series incorporates SPD(serial presence detect). Serial presence detect function is plemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.




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