Features: • JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply• All inputs and outputs are compatible with SSTL_1.8 interface• Posted CAS• Programmable CAS Latency 3 ,4 ,5• OCD (Off-Chip Driver Impedance Adjustment) and OD...
HYMP532S646-E3/C4: Features: • JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply• All inputs and outputs are compatible with SSTL_1.8 interface• Posted ...
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Features: • 1GB (128M x 64) Unbuffered DDR2 SO - DIMM based on 128Mx8 DDR2 DDP SDRAMs•...
Features: • JEDEC standard Double Data Rate2 Synchrnous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0....
Features: • JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0...
Parameter | Symbol | Value | Unit | Note |
Voltage on VDD pin relative to Vss | VDD | - 1.0 V ~ 2.3 V | V | 1 |
Voltage on VDDQ pin relative to Vss | VDDQ | - 0.5 V ~ 2.3 V | V | 1 |
Voltage on any pin relative to Vss | VIN, VOUT | - 0.5 V ~ 2.3 V | V | 1 |
Storage Temperature | TSTG | -50 ~ +100 | 1 | |
Storage Humidity(without condensation) | HSTG | 5 to 95 | % | 1 |
Notes:
1. Stress greater than those listed may cause permanent damage to the device. This is a stress rating only, and device functional operation at or above the conditions indicated is not implied. Expousure to absolute maximum rating con ditions for extended periods may affect reliablility.
This Hynix unbuffered Slim Outline Dual In-Line Memory Module(DIMM) series consists of 512Mb 1st ver. DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 200pin glass-epoxy substrate. This Hynix 512Mb 1st ver. based Unbuffered DDR2 SO-DIMM series provide a high performance 8 byte interface in 67.60mm width form factor of industry standard. The HYMP532S646-E3/C4 is suitable for easy interchange and addition.