HMS30C7202N

·Use pull up resistors at the PSCLK and PSDAT pad output.
·For example, in order to set tPSTXMT as 15ms, when PCLK speed is 3.6864MHz (271.3ns), see the procedure shown below.
1. First of all, total transmission time factor, tXMT = (PSTXMT+1) * tPSTPRI.
2. So that equation is expanded as follows: tXMT = (PSTXMT+1) * {(PSTPRI+1) * tPCLK}.
3. When tXMT is 15ms and tPCLK is 271.3ns, . (PSTXMT+1) * {(PSTPRI+1) is 55288.
4. Due to both PSTXMT and PSTPRI is only 8-bit register, the values of these two register can hold only up to 256. So if we set (PSTPRI+1) to 256 then (PSTXMT+1) will be 216.
5. PSTPRI = 25510 = FF16
6. PSTXMT = 21510 = D716
·You can use the same flow to calculate tPSTREC. Basically as the root, tPSTPRI, is common with tPSTXMT,
the only factor you have to calculate is just PSTREC.

The counter HMS30C7202N is loaded by writing to the RTC data register. The counter will count up on each rising edge of the 1Hz clock and loops back to 0 when the maximum value(0xFFFFFFFF) is reached. At any moment the counter value can be obtained by reading the RTC data register. The value of the match register can also be read at any time, and the read does not affect the counter value. About the HMS30C7202N,the status of the interrupt signal is available in the status register. The status bit is set if a comparator match event has occurred or 1 second has elapsed. Reading from the status register will clear the status register.