HM-6516

Features:

• Low Power Standby . . . . . . . . . . . . . . . . . . . 275µW Max
• Low Power Operation  . . . . . . . . . . . . . . 55mW/MHz Max
• Fast Access Time. . . . . . . . . . . ..  . . . . . . 120/200ns Max
• Industry Standard Pinout
• Single Supply . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0V V_CC
• TTL Compatible
• Static Memory Cells
• High Output Drive
• On-Chip Address Latches
• Easy Microprocessor Interfacing 


Pinout




Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7.0V
Input or Output Voltage Applied for all Grades . . . . . . .GND -0.3V to
                                                                                         V_CC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 


Description

The HM-6516 is a CMOS 2048 x 8 Static Random Access Memory. Extremely low power operation is achieved by the use of complementary MOS design techniques. This low power is further enhanced by the use of synchronous circuit techniques that keep the active (operating) power low, which also gives fast access times. The pinout of the HM-6516 is the popular 24 pin, 8-bit wide JEDEC standard, which allows asy memory board layouts, flexible enough to accommo- date a variety of PROMs, RAMS, EPROMs, and ROMs.

The HM-6516 is ideally suited for use in microprocessor based systems. The byte wide organization simplifies the memory array design, and keeps operating power down to a minimum, because only one device is enabled at a time. The address latches allow very simple interfacing to recent gen- eration microprocessors which employ a multiplexed address/data bus. The convenient output enable control also simplifies multiplexed bus interfacing by allowing the data outputs to be controlled independent of the chip enable.