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GS820E32AT-180

Features: •FT pin for user-configurable flow through or pipelined operation• Dual Cycle Deselect (DCD) operation• 3.3 V +10%/5% core power supply• 2.5 V or 3.3 V I/O supply•LBO pin for Linear or Interleaved Burst mode• Internal input resistors on mode pins allow...

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SeekIC No. : 004355943 Detail

GS820E32AT-180: Features: •FT pin for user-configurable flow through or pipelined operation• Dual Cycle Deselect (DCD) operation• 3.3 V +10%/5% core power supply• 2.5 V or 3.3 V I/O supply&#...

GS820E32AT-180 Data Sheet

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Part Number:
GS820E32AT-180
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• FT pin for user-configurable flow through or pipelined operation
• Dual Cycle Deselect (DCD) operation
• 3.3 V +10%/5% core power supply
• 2.5 V or 3.3 V I/O supply
• LBO pin for Linear or Interleaved Burst mode
• Internal input resistors on mode pins allow floating mode pins
• Default to Interleaved Pipelined mode
• Byte Write (BW) and/or Global Write (GW) operation
• Common data inputs and data outputs
• Clock Control, registered, address, data, and control
• Internal self-timed write cycle
• Automatic power-down for portable applications
• JEDEC standard 100-lead TQFP package
• Pb-Free 100-lead TQFP package available


Application

The GS820E32A is a 2,097,152-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM applications, ranging from DSP main store to networking chip set support.




Pinout

Connection Diagram


Specifications

Symbol Description Value Unit
VDD

VDDQ

VCK		 Voltage on VDD Pins

Voltage in VDDQ Pins

Voltage on Clock Input Pin		 0.5 to 4.6

0.5 to VDD

0.5 to 6		 V

V

V
VI/O

VIN		 Voltage on I/O Pins

Voltage on Other Input Pins		 0.5 to VDDQ+0.5 ( 4.6 V max.)

0.5 to VDD+0.5 ( 4.6 V max.)		 V

V
IIN

IOUT

PD		 Input Current on Any Pin

Output Current on Any I/O Pin

Package Power Dissipation		 +/20

+/20

1.5		 mA

mA
TSTG

TBIAS		 Storage Temperature

Temperature Under Bias		 55 to 125

55 to 125

Note:
Permanent damage to the device may occur if the Absolute Maximum Ratings are exceeded. Operation should be restricted to Recommended Operating Conditions. Exposure to conditions exceeding the Absolute Maximum Ratings, for an extended period of time, may affect reliability of this component.




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