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GAL20XV10

Features: • HIGH PERFORMANCE E2CMOS ® TECHNOLOGY - 10 ns Maximum Propagation Delay - Fmax = 100 MHz - 7 ns Maximum from Clock Input to Data Output - TTL Compatible 16 mA Outputs - UltraMOS® Advanced CMOS Technology• 50% to 75% REDUCTION IN POWER FROM BIPOLAR - 90mA Maximum Icc ...

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GAL20XV10: Features: • HIGH PERFORMANCE E2CMOS ® TECHNOLOGY - 10 ns Maximum Propagation Delay - Fmax = 100 MHz - 7 ns Maximum from Clock Input to Data Output - TTL Compatible 16 mA Outputs - UltraMOS...

GAL20XV10 Data Sheet

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Part Number:
GAL20XV10
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• HIGH PERFORMANCE E2CMOS ® TECHNOLOGY
   - 10 ns Maximum Propagation Delay
   - Fmax = 100 MHz
   - 7 ns Maximum from Clock Input to Data Output
   - TTL Compatible 16 mA Outputs
   - UltraMOS® Advanced CMOS Technology
• 50% to 75% REDUCTION IN POWER FROM BIPOLAR
   - 90mA Maximum Icc
   - 75mA Typical Icc
• ACTIVE PULL-UPS ON ALL PINS
• E2 CELL TECHNOLOGY
   - Reconfigurable Logic
   - Reprogrammable Cells
   - 100% Tested/100% Yields
   - High Speed Electrical Erasure (<100 ms)
   - 20 Year Data Retention
• TEN OUTPUT LOGIC MACROCELLS
   - XOR Gate Capability on all Outputs
   - Full Function and Parametric Compatibility with PAL12L10, 20L10, 20X10, 20X8, 20X4
   - Registered or Combinatorial with Polarity
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
• APPLICATIONS INCLUDE:
   - High Speed Counters
   - Graphics Processing
   - Comparators
• ELECTRONIC SIGNATURE FOR IDENTIFICATION


Pinout

Connection Diagram


Specifications

Supply voltage Vcc ......................................... 0.5 to+7V
Input voltage applied .......................... 2.5 to VCC +1.0V
Off-state output voltage applied ......... 2.5 to VCC +1.0V
Storage Temperature ................................... 65 to 150
Ambient Temperature with
Power Applied .............................................. 55 to 125

1.Stresses above those listed under the "Absolute Maximum Ratings" may cause permanent damage to
   the device. These are stress only ratings and functional operation of the device at these or at any other
   conditions above those indicated in the operational sections of this specification is not implied (while
   programming, follow the programming specifications).


Description

The GAL20XV10 combines a high performance CMOS process with electrically erasable (E2) floating gate technology to provide the highest speed Exclusive-OR PLD available in the market. At 90mA maximum Icc (75mA typical Icc), the GAL20XV10 provides a substantial savings in power when compared to bipolar counterparts. E2CMOS technology offers high speed (<100ms) erase times providing the ability to reprogram, reconfigure or test the devices quickly and efficiently.

The generic architecture provides maximum design flexibility by allowing the Output Logic Macrocell (OLMC) to be configured by the user. An important subset of the many architecture configurations possible with the GAL20XV10 are the PAL® architectures listed in the macrocell description section of this document. The GAL20XV10 is capable of emulating these PAL architectures with full function and parametric compatibility.

Unique test circuitry and reprogrammable cells of GAL20XV10 allow complete AC, DC, and functional testing during manufacturing. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified.




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