Specifications Parameter Symbol Test Conditions Min Max Units Drain-Source Voltage VDS -3V < VGS < +0V 8 V Gate-Source Voltage VGS 0V < VDS < +8V -3 V Drain-Source Current IDS For VDS > 2V IDSS mA Gate Current IG Forward or reverse c...
FPD3000SOT89: Specifications Parameter Symbol Test Conditions Min Max Units Drain-Source Voltage VDS -3V < VGS < +0V 8 V Gate-Source Voltage VGS 0V < VDS < +8V -3 V ...
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Features: 32.5 dBm Linear Output Power17 dB Power Gain at 2 GHz9.5 dB Maximum Stable Gain at 10 GH...
Parameter | Symbol | Test Conditions | Min | Max | Units |
Drain-Source Voltage | VDS | -3V < VGS < +0V | 8 | V | |
Gate-Source Voltage | VGS | 0V < VDS < +8V | -3 | V | |
Drain-Source Current | IDS | For VDS > 2V | IDSS | mA | |
Gate Current | IG | Forward or reverse current | 30 | mA | |
RF Input Power2 | PIN | Under any acceptable bias state | 600 | mW | |
Channel Operating Temperature | TCH | Under any acceptable bias state | 175 | ºC | |
Storage Temperature | TSTG | Non-Operating Storage | -40 | 150 | ºC |
Total Power Dissipation | PTOT | See De-Rating Note below | 3.5 | W | |
Gain Compression | Comp. | Under any bias conditions | 5 | dB | |
Simultaneous Combination of Limits3 | 2 or more Max. Limits | 80 | % |
1TAmbient = 22°C unless otherwise noted 2Max. RF Input Limit must be further limited if input VSWR > 2.5:1
3Users should avoid exceeding 80% of 2 or more Limits simultaneously
Notes:
• Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
• Thermal Resitivity specification assumes a Au/Sn eutectic die attach onto a Au-plated copper heatsink or rib.
• Power Dissipation defined as: PTOT (PDC + PIN) POUT, where
PDC: DC Bias Power
PIN: RF Input Power
POUT: RF Output Power
• Absolute Maximum Power Dissipation to be de-rated as follows above 22°C:
PTOT=3.5W (0.025W/°C) x TPACK
where THS = heatsink or ambient temperature above 22°C
(coefficient of de-rating formula is the Thermal Conductivity)
Example: For a 85°C heatsink temperature: PTOT = 3.5W (0.025 x (65 22)) = 2.43W
The FPD3000SOT89 is a packaged depletion mode AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (pHEMT). It utilizes a 0.25 x 3000 m Schottky barrier Gate, defined by highresolution stepper-based photolithography. The recessed and offset Gate structure minimizes parasitics to optimize performance, with an epitaxial structure designed for improved linearity over a range of bias conditions and input power levels. The FPD3000SOT89 is available in die form and in other packages.
FPD3000SOT89 applications include drivers or output stages in PCS/Cellular base station high-interceptpoint LNAs, WLL and WLAN systems, and other types of wireless infrastructure systems.