FPD3000

Features: 32.5 dBm Linear Output Power at 12 GHz6.5 dB Power Gain at 12 GHz8 dB Maximum Stable Gain at 12 GHz42 dBm Output IP330% Power-Added EfficiencySpecifications Series FPD Frequency (MHz) 1000 to 15,000 Gain (dB) 6.5 OP1dB (dBm) 32.5 OIP3 (dBm) ...

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SeekIC No. : 004343024 Detail

FPD3000: Features: 32.5 dBm Linear Output Power at 12 GHz6.5 dB Power Gain at 12 GHz8 dB Maximum Stable Gain at 12 GHz42 dBm Output IP330% Power-Added EfficiencySpecifications Series FPD Frequ...

floor Price/Ceiling Price

Part Number:
FPD3000
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/25

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Product Details

Description



Features:

32.5 dBm Linear Output Power at 12 GHz
6.5 dB Power Gain at 12 GHz
8 dB Maximum Stable Gain at 12 GHz
42 dBm Output IP3
30% Power-Added Efficiency





Specifications

Series FPD
Frequency (MHz) 1000 to 15,000
Gain (dB) 6.5
OP1dB (dBm) 32.5
OIP3 (dBm) 42
Eff (%) 30
Id (mA) 930
Package/Size (Dim in mm) Bare Die


Parameter Symbol Test Conditions Min Max Units
Drain-Source Voltage VDS -3V < VGS < +0V 8 V
Gate-Source Voltage VGS 0V < VDS < +8V -3 V
Drain-Source Current IDS For VDS > 2V IDSS mA
Gate Current IG Forward or reverse current 25 mA
RF Input Power2 PIN Under any acceptable bias state 600 mW
Channel Operating Temperature TCH Under any acceptable bias state 175 ºC
Storage Temperature TSTG Non-Operating Storage -40 150 ºC
Total Power Dissipation PTOT See De-Rating Note below 7.3 W
Gain Compression Comp. Under any bias conditions 5 dB
Simultaneous Combination of Limits3 2 or more Max. Limits 80 %
1TAmbient = 22°C unless otherwise noted 2Max. RF Input Limit must be further limited if input VSWR > 2.5:1
3Users should avoid exceeding 80% of 2 or more Limits simultaneously
Notes:
• Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
• Thermal Resitivity specification assumes a Au/Sn eutectic die attach onto a Au-plated copper heatsink or rib.
• Power Dissipation defined as: PTOT (PDC + PIN) POUT, where
PDC: DC Bias Power
PIN: RF Input Power
POUT: RF Output Power
• Absolute Maximum Power Dissipation to be de-rated as follows above 22°C:
PTOT= 7.3W (0.05W/°C) x THS
where THS = heatsink or ambient temperature above 22°C
Example: For a 85°C heatsink temperature: PTOT = 7.3W (0.05 x (85 22)) = 4.2W





Description

The FPD3000 is an AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (PHEMT),featuring a 0.25 m by 3000 m Schottky barrier gate, defined by high-resolution stepper-based photolithography. The recessed and offset Gate structure minimizes parasitics to optimize performance. The epitaxial structure and processing have been optimized for reliable high-power applications. The FPD3000 also features Si3N4 passivation and is available in a P100 flanged ceramic package and in the low cost plastic SOT89 plastic package.

FPD3000 applications include commercial and other narrowband and broadband high-performance amplifiers, including SATCOM uplink transmitters, PCS/Cellular low-voltage high-efficiency output amplifiers, and medium-haul digital radio transmitters.






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