Features: 32.5 dBm Linear Output Power17 dB Power Gain at 2 GHz9.5 dB Maximum Stable Gain at 10 GHz42 dBm Output IP345% Power-Added Efficiency at 2 GHzSpecifications Parameter Symbol Test Conditions Min Max Units Drain-Source Voltage VDS -3V < VGS < +0V 9 V Gate-Sour...
FPD3000P100: Features: 32.5 dBm Linear Output Power17 dB Power Gain at 2 GHz9.5 dB Maximum Stable Gain at 10 GHz42 dBm Output IP345% Power-Added Efficiency at 2 GHzSpecifications Parameter Symbol Test Co...
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Specifications Parameter Symbol Test Conditions Min Max Units Drain-Source Voltage ...
Parameter | Symbol | Test Conditions | Min | Max | Units |
Drain-Source Voltage | VDS | -3V < VGS < +0V | 9 | V | |
Gate-Source Voltage | VGS | 0V < VDS < +8V | -3 | V | |
Drain-Source Current | IDS | For VDS > 2V | IDSS | mA | |
Gate Current | IG | Forward or reverse current | 25 | mA | |
RF Input Power2 | PIN | Under any acceptable bias state | 600 | mW | |
Channel Operating Temperature | TCH | Under any acceptable bias state | 175 | ºC | |
Storage Temperature | TSTG | Non-Operating Storage | -40 | 150 | ºC |
Total Power Dissipation | PTOT | See De-Rating Note below | 5.3 | W | |
Gain Compression | Comp. | Under any bias conditions | 5 | dB | |
Simultaneous Combination of Limits3 | 2 or more Max. Limits | 80 | % |
1TAmbient = 22°C unless otherwise noted 2Max. RF Input Limit must be further limited if input VSWR > 2.5:1
3Users should avoid exceeding 80% of 2 or more Limits simultaneously
Notes:
• Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
• Thermal Resitivity specification assumes a Au/Sn eutectic die attach onto a Au-plated copper heatsink or rib.
• Power Dissipation defined as: PTOT (PDC + PIN) POUT, where
PDC: DC Bias Power
PIN: RF Input Power
POUT: RF Output Power
• Absolute Maximum Power Dissipation to be de-rated as follows above 22°C:
PTOT=5.3W (0.042W/°C) x THS
where THS = heatsink or ambient temperature above 22°C
(coefficient of de-rating formula is the Thermal Conductivity)
Example: For a 85°C heatsink temperature: PTOT = 5.3W (0.042 x (85 22)) = 2.65
The FPD3000P100 is a packaged AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (PHEMT), featuring a 0.25 m by 3000 m Schottky barrier gate, defined by highresolution stepper-based photolithography. The recessed and offset Gate structure minimizes parasitics to optimize performance. The epitaxial structure and processing have been optimized for reliable high-power applications. The FPD3000P100 also features Si3N4 passivation and is also available in die form and in the low cost plastic SOT89 plastic package.
FPD3000P100 applications include commercial and other narrowband and broadband high-performance amplifiers, including SATCOM uplink transmitters, PCS/Cellular low-voltage high-efficiency output amplifiers, and medium-haul digital radio transmitters.