EDI8L32128V

Features: · 128Kx32 bit CMOS Static· Analog SHARCTM External Memory Solution· ADSP-21060L· ADSP-21062L· Random Access Memory Array· Fast Access Times: 12, 15 and 20ns· User Confi gurable Organization· with Minimal Additional Logic· Master Output Enable and Write Control· TTL Compatible I...

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EDI8L32128V Picture
SeekIC No. : 004333852 Detail

EDI8L32128V: Features: · 128Kx32 bit CMOS Static· Analog SHARCTM External Memory Solution· ADSP-21060L· ADSP-21062L· Random Access Memory Array· Fast Access Times: 12, 15 and 20ns· User Confi gurable Orga...

floor Price/Ceiling Price

Part Number:
EDI8L32128V
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/31

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Product Details

Description



Features:

· 128Kx32 bit CMOS Static
· Analog SHARCTM External Memory Solution
· ADSP-21060L
· ADSP-21062L
· Random Access Memory Array
· Fast Access Times: 12, 15 and 20ns
· User Confi gurable Organization
· with Minimal Additional Logic
· Master Output Enable and Write Control
· TTL Compatible Inputs and Outputs
· Fully Static, No Clocks
· Surface Mount Package
· 68 Lead PLCC, No. 99 (JEDEC MO-47AE)
· Small Footprint, 0.990 Sq. In.
· Multiple Ground Pins for Maximum
· Noise Immunity
· Single 3.3V (±5%) Supply Operation



Pinout

  Connection Diagram


Specifications

Voltage on Vcc Relative to Vss -0.5V to +4.6V
Operating Temperature TA (Ambient)
Commercial
Industrial
0°C to + 70°C
-40°C to +85°C
Storage Temperature -55°C to +125°C
Power Dissipation 3 Watts
Output Current. 20 mA
Junction Temperature, TJ 175°C



Description

The EDI8L32128V is a high speed, 3.3V, four megabit density Static RAM. The device is available with access times of 12, 15 and 20ns, allowing the device to support 60MHZ DSPs with no wait states. The high speed, 3.3V supply voltage and byte confi gurability make the device ideal for interfacing with Analog Devices ADSP-21062L or ADSP-21060L SHARC DSPs.

The EDI8L32128V device can be confi gured as a 128Kx32 and used to create a single chip external data memory solution for the SHARC (fi gure 1). Providing a 51% space savings when compared to four 128Kx8, 400mil wide plastic SOJs. The EDI8L32128V has a 10pf load on the data lines vs. 24pf for four plastic SOJs. Memory upgrades in the same footprint can be accomplished with the EDI8L32256V (256Kx32) or the EDI8L32512V (512KX32). This is covered in detail in the application report "The EDI's x32 MCM-L SRAM Family: Integrated Memory Solution for the Analog SHARC DSP" Alternatively the device's chip enables can confi gure it as a 256Kx16. A 256Kx48 program memory array for the SHARC s created using three devices (fi gure 2). If this memory is too deep, two 128Kx24's (EDI8L24128V) can be used to create a 128Kx48 memory array.




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