EDI8F32128C

Features:

128Kx32 bit CMOS Static
Random Access Memory
  Access Times: 15, 20, and 25ns
  Individual Byte Selects
  Fully Static, No Clocks
  TTL Compatible I/O
Single +5V (±10%) Supply Operation
High Density Package with JEDEC Standard Pinouts
  64 Pin ZIP, No. 85
    • Height: 13.97 (0.550")
  64 Lead SIMM, No. 333
    • Height: 15.62 (0.615")
  Common Data Inputs and Outputs


Pinout




Specifications

Parameter	Maximum Ratings
Voltage on any pin relative to VSS	-0.5V to 7.0V
Operating Temperature TA (Ambient) Commercial Industrial	0°C to +70°C -40°C to +85°C
Storage Temperature, Plastic	-55°C to +125°C
Power Dissipation	8.0 Watt
Output Current	20 mA

* Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specifi cation is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.


Description

The EDI8F32128C is a high speed 4Mb Static RAM module organized as 128K words by 32 bits. This module is constructed from four 128Kx8 Static RAMs in SOJ packages on an epoxy laminate (FR4) board.

Four chip enables (E0# - E3#) are used to independently enable the four bytes. Reading or writing can be executed on individual bytes or any combination of multiple bytes through proper use of selects.

The EDI8F32128C is offered in 64 pin ZIP/SIMM package which enables eight megabits of memory to be placed in less than 1.4 square inches of board space.

All inputs and outputs are TTL compatible and operate from a single 5V supply. Fully asynchronous circuitry requires no clocks or refreshing for operation and provides equal access and cycle times for ease of use.

The ZIP and SIMM modules contain two pins, PD1 and PD2, which are used to identify module memory density in applications where alternate modules can be interchanged.