Features: 9-bit inverting BTL transceiver Meets IEEE 1194.1 standard on Backplane TransceiverLogic (BTL) Includes on chip competition logic and parity checking Supports live insertion Glitch free power-up/down protection Typically less than 5 pF bus-port capacitance Low bus-port voltage swing (typ...
DS3885: Features: 9-bit inverting BTL transceiver Meets IEEE 1194.1 standard on Backplane TransceiverLogic (BTL) Includes on chip competition logic and parity checking Supports live insertion Glitch free po...
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The DS3885 is one in a series of transceivers designed spe-cifically for the implementation of high performance Future-busa and proprietary bus interfaces. The DS3885 Arbitra-tion Transceiver is designed to conform to IEEE 1194.1(Backplane Transceiver LogicÐBTL) as specified in theIEEE 896.2 Futurebusa specification. The ArbitrationTransceiver incorporates the competition logic internallywhich simplifies the implementation of a Futurebusa appli-cation by minimizing the on board logic required.
The DS3885 driver output configuration is an NPN open col-lector which allows Wired-OR connection on the bus. Eachdriver output incorporates a Schottky diode in series with itscollector to isolate the transistor output capacitance fromthe bus thus reducing the bus loading in the inactive state.The BTL drivers also have high sink current capability tocomply with the bus loading requirements defined withinIEEE 1194.1 BTL specification.Backplane Transceiver Logic (BTL) is a signaling standardthat was invented and first introduced by National Semicon-