DS05-11039-4E

• Single +3.3 V Supply: +0.3 V / -0.15 V tolerance (-60)
                                     ±0.3 V tolerance (-70/-80)
• LVTTL compatible I/O interface
• 4 K refresh cycles every 64 ms
• Dual banks operation
• Burst read/write operation and burst read/single write operation capability
• Byte control by DQMU/DQML
• Programmable burst type, burst length, and CAS latency
• Auto-and Self-refresh (every 15.6 ms)
• CKE power down mode
• Output Enable and Input Data Mask
• 167 MHz/143MHz/125 MHz clock frequency

WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

The DS05-11039-4E is a CMOS Synchronous Dynamic Random Access Memory (SDRAM) containing 16,777,216 memory cells accessible in an 16-bit format. The MB81F161622B features a fully synchronous operation referenced to a positive edge clock whereby all operations are synchronized at a clock input which enables high performance and simple user interface coexistence. DS05-11039-4E is designed to reduce the complexity of using a standard dynamic RAM (DRAM) which requires many control signal timing constraints, and may improve data bandwidth of memory as much as 5 times more than a standard DRAM.

DS05-11039-4E is ideally suited for laser printers, high resolution graphic adapters, accelerators and other applications where an extremely large memory and bandwidth are required and where a simple interface is needed.