Features: • Fast cycle time: (Cycle) (Frequency) CXK77V1840GB-8 8 ns 125 MHz CXK77V1840GB-10 10 ns 100 MHz CXK77V1840GB-12 12 ns83.3 MHz• Fast clock to data valid CXK77V1840GB-8 4 ns CXK77V1840GB-105.5 ns CXK77V1840GB-127.5 ns• High speed, low power consumption• Single +3.3...
CXK77V1840GB-12: Features: • Fast cycle time: (Cycle) (Frequency) CXK77V1840GB-8 8 ns 125 MHz CXK77V1840GB-10 10 ns 100 MHz CXK77V1840GB-12 12 ns83.3 MHz• Fast clock to data valid CXK77V1840GB-8 4 ns CXK...
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Features: • Fast cycle time: (Cycle) (Frequency) CXK77910ATM/AYM-10 10.0ns 100MHz CXK77910AT...
Features: • Fast cycle time: (Cycle) (Frequency) CXK77920TM/YM-11 11.0ns 90MHz CXK77920TM/YM...
Item |
Symbol |
Rating |
Unit |
Supply voltage |
VDD |
0.5 to +4.6 |
V |
Input voltage |
VIN |
-0.5 to VCC+0.5 (4.6V max.) |
V |
Output Voltage |
VO |
-0.5 to VCC+0.5 (4.6V max.) |
V |
Allowable power dissipation |
PD |
1.7 |
W |
Operating temperature |
Topr |
0 to 70 |
|
Storage temperature |
Tstg |
-55 to 150 |
|
Soldering temperature • time | Tsolder |
235 • 10 |
• sec |
The CXK77V1840GB-12 is a high speed CMOS synchronous static RAM with common I/O pins, organized as 262,144-words by 18-bits. This synchronous SRAM integrates input registers, high speed SRAM and output registers onto a single monolithic IC. All input signals except OE are latched at the positive edge of an external clock (CLK). The RAM data from the previous cycle is presented at the positive edge of the subsequent clock cycle. Write operation is initiated by the positive edge of CLK and is internally self-timed. This feature eliminates complex off-chip write pulse generation and provides increased flexibility for incoming signals. Asynchronous OE adds the flexibility of data bus control. 125 MHz operation CXK77V1840GB-12 is obtained from a single 3.3 V power supply.