Features: • High speed, low power consumption• Single +3.3V power supply: 3.3V ± 5%• Inputs and outputs are LVTTL/LVCMOS-compatible• Byte Select capability• Asynchronous OE• Common data input and output• 9ns cycle time (110MHz)• All inputs (except OE...
CXK77V1810TM-9: Features: • High speed, low power consumption• Single +3.3V power supply: 3.3V ± 5%• Inputs and outputs are LVTTL/LVCMOS-compatible• Byte Select capability• Asynchronou...
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Item |
Symbol |
Rating |
Unit |
Supply voltage |
VDD |
0.5 to +4.6 |
V |
Input voltage |
VIN |
-0.5 to VCC+0.5 (4.6V max.) |
V |
Output Voltage |
VO |
-0.5 to VCC+0.5 (4.6V max.) |
V |
Allowable power dissipation |
PD |
1.0 |
W |
Operating temperature |
Topr |
0 to 70 |
|
Storage temperature |
Tstg |
-55 to 150 |
|
Soldering temperature • time | Tsolder |
260 • 10 |
• sec |
The CXK77V1810TM-9 is a high-speed CMOS synchronous static RAM with common I/O pins, organized as 65,536-words-by-18-bits. This synchronous SRAM integrates input registers, high-speed SRAM and output registers onto a single monolithic IC. All input signals, except OE, are latched at the positive edge of an external clock (CLK). The RAM data from the previous cycle is presented at the positive edge of the subsequent clock cycle. Write operation is initiated by the positive edge of CLK and is internally self-timed. This feature eliminates complex off-chip CXK77V1810TM-9 write pulse generation and provides increased flexibility for incoming signals. Asynchronous OE adds the flexibility of data bus control. 100MHz operation is obtained from a single 3.3V power supply.