Am42BDS6408H

Features: `Handshaking feature - Provides host system with minimum possible latency by monitoring RDY - Reduced Wait-state handshaking option further reduces initial access cycles required for burst accesses beginning on even addresses`Hardware reset input (RESET#) - Hardware method to reset the d...

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SeekIC No. : 004283639 Detail

Am42BDS6408H: Features: `Handshaking feature - Provides host system with minimum possible latency by monitoring RDY - Reduced Wait-state handshaking option further reduces initial access cycles required for burst...

floor Price/Ceiling Price

Part Number:
Am42BDS6408H
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/24

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Product Details

Description



Features:

`Handshaking feature - Provides host system with minimum possible latency by monitoring RDY - Reduced Wait-state handshaking option further reduces initial access cycles required for burst accesses beginning on even addresses
`Hardware reset input (RESET#) - Hardware method to reset the device for reading array data
`WP# input - Write protect (WP#) function allows protection of the four highest and four lowest 4 kWord boot sectors, egardless of sector protect status
`Persistent Sector Protection - A command sector protection method to lock combinations of individual sectors and sector groups to prevent program or erase operations within that sector - Sectors can be locked and unlocked in-system at VCC level
`Password Sector Protection - A sophisticated sector protection method to lock combinations of individual sectors and sector groups to prevent program or erase operations within that sector using a user-defined 64-bit password




Pinout

  Connection Diagram


Specifications

Storage Temperature
Plastic Packages . . . . . . . . . . . 65°C to +150°C
Ambient Temperature
with Power Applied. . . . . . . . . 65°C to +125°C
Voltage with Respect to Ground:
All Inputs and I/Os except
as noted below (Note 1) . . .. 0.5 V to VIO + 0.5 V
VCC (Note 1) . . . . . . . . . . . . . . . . .0.5 V to +2.5 V
VIO . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to +2.5 V
A9, RESET#, ACC (Note 1) . . . . .0.5 V to +12.5 V
Output Short Circuit Current (Note 3) . . . .. 100 mA
Notes:
1. Minimum DC voltage on input or I/Os is 0.5 V. During voltage transitions, inputs or I/Os may undershoot VSS to 2.0 V for periods of up to 20 ns. See Figure 8. Maximum DC voltage on input or I/Os is VCC + 0.5 V. During voltage transitions outputs may overshoot to VCC + 2.0 V for periods up to 20 ns. See Figure 9.
2. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second.
3. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this data sheet is not implied. Exposure of the device to absolute maximum rating conditions  for extended periods may affect device reliability.




Description

The Am42BDS6408H is a 64 Mbit, 1.8 Volt-only, simultaneous Read/Write, Burst Mode Flash memory device, organized as 4,194,304 words of 16 bits each. This device uses a single VCC of 1.65 to 1.95 V to read, program, and erase the memory array. A 12.0-volt VHH on ACC may be used for faster program performance if desired.

At 66 MHz, the device provides a burst access of 11 ns at 30 pF with a latency of 56 ns at 30 pF.At 54 MHz, the device provides a burst access of 13.5 ns at 30 pF with a latency of 69ns at 30 pF. The device operates within the industrial temperature range of -40°C to +85°C. Am42BDS6408H is offered in the 64-ball FBGA package.

The Simultaneous Read/Write architecture provides simultaneous operation by dividing the memory space into four banks. Am42BDS6408H can improve overall system performance by allowing a host system to program or erase in one bank, then immediately and simultaneously read from another bank,  ith zero latency. This releases the system from waiting for the completion of program or erase operations.




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