Features: High performance- Access times as fast as 70 ns CMOS low power consumption- 30 mA maximum active current- 100 µA maximum standby current- No data retention power consumption Compatible with JEDEC-standard byte-wide 32-pin EPROM pinouts- 32-pin PDIP- 32-pin PLCC- 32-pin TSOP 100,000...
Am28F010A: Features: High performance- Access times as fast as 70 ns CMOS low power consumption- 30 mA maximum active current- 100 µA maximum standby current- No data retention power consumption Compatib...
SeekIC Buyer Protection PLUS - newly updated for 2013!
268 Transactions
All payment methods are secure and covered by SeekIC Buyer Protection PLUS.
DescriptionThe AM28F010-120EI/T is one member of the AT28C010 family which is designed as the elec...
PinoutDescriptionThe AM28F010-120JC is designed as one kind of 1M Kilobit (128 K x 8-Bit) CMOS 12....
High performance
- Access times as fast as 70 ns
CMOS low power consumption
- 30 mA maximum active current
- 100 µA maximum standby current
- No data retention power consumption
Compatible with JEDEC-standard byte-wide 32-pin EPROM pinouts
- 32-pin PDIP
- 32-pin PLCC
- 32-pin TSOP
100,000 write/erase cycles minimum
Write and erase voltage 12.0 V ±5%
Latch-up protected to 100 mA from
1 V to VCC +1 V
Embedded Erase Electrical Bulk Chip Erase
- 5 seconds typical chip erase, including pre-programming
Embedded Program
- 14 µs typical byte program, including time-out
- 4 seconds typical chip program
Command register architecture for microprocessor/microcontroller compatible write interface
On-chip address and data latches
Advanced CMOS flash memory technology
- Low cost single transistor memory cell
Embedded algorithms for completely self-timed write/erase operations
Latch-up protected to 100 mA from
1 V to VCC +1 V
Embedded Erase Electrical Bulk Chip Erase
- 5 seconds typical chip erase, including pre-programming
Embedded Program
- 14 µs typical byte program, including time-out
- 4 seconds typical chip program
Command register architecture for microprocessor/microcontroller compatible write interface
On-chip address and data latches
Advanced CMOS flash memory technology
- Low cost single transistor memory cell
Embedded algorithms for completely self-timed write/erase operations
The standard Am28F010A offers access times of as fast as 70 ns, allowing high speed microprocessors to operate without wait states. To eliminate bus contention, the device has separate chip enable (CE#) and output enable (OE#) controls.
AMD's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. TheAm28F010A uses a command register to manage this functionality. The command register allows for 100%TTLlevel control inputs and fixed power supply levelsduring erase and programming, while maintaining maximum EPROM compatibility.
The Am28F010A is compatible with the AMD Am28F256A, Am28F512A, and Am28F020A Flash memories. All devices in the Am28Fxxx family follow the JEDEC 32-pin pinout standard. In addition, all deviceswithin this family that offer Embedded Algorithms usethe same command set. This offers designers the flexi- bility to retain the same device footprint and commandset, at any density between 256 Kbits and 2 Mbits.
AMD's Flash technology reliably stores memory con- tents even after 100,000 erase and program cycles. The AMD cell is designed to optimize the erase and program- ming mechanisms. In addition, the combination ofadvanced tunnel oxide processing and low internal elec-tric fields for erase and programming operations pro- duces reliable cycling. The Am28F010A uses a 12.0±5% VPP input to perform the erase and program- ming functions.
The highest degree of latch-up protection is achieved with AMD's proprietary non-epi process. Latch-up pro-tection is provided for stresses up to 100 mA on address and data pins from 1 V to VCC +1 V.
AMD's Flash technology combines years of EPROM and EEPROM experience to produce the highest levels of quality, reliability, and cost effectiveness. The Am28F010A electrically erases all bits simultaneously using Fowler-Nordheim tunneling. The bytes are programmed one byte at a time using the EPROM pro- gramming mechanism of hot electron injection.