74F776

The 74F776 is an octal bidirectional latched transceiver and is intended to provide the electrical interface to a high performance wiredOR bus. The B port inverting drivers are lowcapacitance open collecto with controlled ramp and are designed to sink 100mA from 2 volts. The B port inverting receivers have a 100 mV threshold region and a 4ns glitch filter.

The 74F776 B port interfaces to 'Backplane Transceiver Logic' (BTL). BTL features a reduced (1V to 2V) voltage swing for lower power consumption and a series diode on the drivers to reduce capacitive loading. Incident wave switching is employed, therefore BTL propagation delays are short. Although the voltage swing is less for BTL, so is its receiver threshold, therefore noise margins are excellent. BTL offers low power consumption, low ground bounce, EMI and crosstalk, low capacitive loading, superior noise margin and low propagation delays. This results in a high bandwidth, reliable backplane.

The 74F776 A port has TTL 3state drivers and TTL receivers with a latch function. A separate highlevel control voltage input (VX) is provided to limit the A side output level to a given voltage level (such as 3.3V). For 5.0V systems, VX is simply tied to VCC.

The 74F776 has a designed feature to control the B output transitions during power sequencing. There are two possible sequencing, They are as follows:

1.When LE  = low and OEB n = low then the B outputs are disabled until the LE circuitry takes control. Then the B outputs will follow the A inputs, making a maximum of one transition during powerup (or down).

2. If LE = high or OEB n = high then the B outputs will be disabled during powerup (or down).