74F725A

The 74F725A consists of four 3-to-1 multiplexers designed for address multiplexing of dynamic RAMs and other multiplexing applications. Select (S0, S1) inputs control which line is to be selected, as defined in the Function Table for 74F723A/74F723-1. When the invering input (INV) is Low, the input data path is inverted.

To improve speed and noise immunity, VCC and GND side pins of the 74F725A are used. The 3-State outputs source 15mA and sink 64mA. The 74F723-1 is the same as 74F723A except that it has a 30
temination impedance on each output to reduce line noise and the 3-State outputs sink 5mA.

The 74F725A consists of four 4-to1 multiplexers designed for general multiplexing purpose. The select (S0, S1) inputs control which line is to be selected, as defined in the Function Table for 74F725A. The outputs source 15mA and sink 64mA. The 74F725-1 is the same as the 74F725A except that it has a 30
termination impedance on each output to reduce line noise and the outputs sink 5mA.