Features: • High impedance PNP base input for reduced loading (20mA in High and Low states)• 8bit parallel storage register• Shift register has asynchronous direct overriding reset• Shift load SHLD is functional when SHCP is Low and locked out when SHCP is High.• Guar...
74F598: Features: • High impedance PNP base input for reduced loading (20mA in High and Low states)• 8bit parallel storage register• Shift register has asynchronous direct overriding reset...
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SYMBOL | PARAMETER | RATING | UNIT |
VCC | Supply voltage | 0.5 to +7.0 | V |
VIN | Input voltage | 0.5 to +7.0 | V |
IIN | Input current | 30 to +5 | mA |
VOUT | Voltage applied to output in High output state | 0.5 to +VCC | V |
IOUT | Current applied to output in Low output state Qs I/O0 I/O7 |
40 48 |
mA |
Tamb | Operating free-air temperature range | 0 to +70 | °C |
Tstg | Storage temperature range | 65 to +150 | °C |
The 74F598 consists of an 8bit storage register feeding a parallelin/serialin, parallelout/serialout 8bit shift register. Both the storage register and shift register have positive edgetriggered clocks. The shift register of the 74F598 has asynchronous reset and when SHCP is Low, it has asynchronous load.