74F539

PinoutSpecificationsStorage Temperature -65°C to +150°CAmbient Temperature under Bias -55°C to +125°CJunction Temperature under Bias -55°C to +150°CVCC Pin Potential to Ground Pin-0.5V to +7.0VInput Voltage (Note 2) -0.5V to +7.0VInput Current (Note 2)-30 mA to +5.0 mAVoltage Applied to Outputin ...

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74F539 Picture
SeekIC No. : 004249793 Detail

74F539: PinoutSpecificationsStorage Temperature -65°C to +150°CAmbient Temperature under Bias -55°C to +125°CJunction Temperature under Bias -55°C to +150°CVCC Pin Potential to Ground Pin-0.5V to +7.0VInpu...

floor Price/Ceiling Price

Part Number:
74F539
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/10/30

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Product Details

Description



Pinout

  Connection Diagram


Specifications

Storage Temperature                                         -65°C to +150°C
Ambient Temperature under Bias                       -55°C to +125°C
Junction Temperature under Bias                       -55°C to +150°C
VCC Pin Potential to Ground Pin                               -0.5V to +7.0V
Input Voltage (Note 2)                                             -0.5V to +7.0V
Input Current (Note 2)                                       -30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output                                                        -0.5V to VCC
3-STATE Output                                                       -0.5V to +5.5V
Current Applied to Output
in LOW State (Max)                                   twice the rated IOL (mA)
Free Air Ambient Temperature                                0°C to +70°C
Supply Voltage                                                        +4.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life  mpaired. Functional operation under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.




Description

The 74F539 contains two independent decoders. Each accepts two Address (A0, A1) input signals and decodes them to select one of four mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active HIGH (P = L) or active LOW (P = H). An active LOW input Enable (E) is available for data demultiplexing; data of the 74F539 is routed to the selected output in non-inverted form in the active LOW mode or in inverted form in the active HIGH mode. A HIGH signal on the active LOW Output Enable (OE) input forces the 3-STATE outputs to the high impedance state.




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