3D7501

Features:

·  All-silicon, low-power CMOS technology
·  TTL/CMOS compatible inputs and outputs
·  Vapor phase, IR and wave solderable
·  Auto-insertable (DIP pkg.)
·  Low ground bounce noise
·  Maximum data rate: 50 MBaud


Pinout

PIN DESCRIPTIONS
DAT         Data Input
CLK         Clock Input
RESB       Reset
TX           Signal Output
TXB         Inverted Signal Output
VCC        +5 Volts
GND        Ground

Specifications

PARAMETER	SYMBOL	MIN	MAX	UNITS	NOTES
DC Supply Voltage	VDD	-0.3	7.0	V
Input Pin Voltage	VIN	-0.3	VDD+0.3	V
Input Pin Current	IIN	-1.0	1.0	mA	25C
Storage Temperature	TSTRG	-55	150	C	10 sec
Lead Temperature	TLEAD		300	C

Description

The 3D7501 is a monolithic CMOS Manchester Encoder. The clock and data, present at the unit input, are combined into a single biphase-level signal. In this encoding mode, a logic one is represented by a high-to-low transition within the bit cell, while a logic zero is represented by a low-to-high transition. The unit operating baud rate (in Mbaud) is equal to the input clock frequency (in MHZ) . All pins marked N/C must be left unconnected.

The all-CMOS 3D7501 integrated circuit has been designed as a reliable, economic alternative to hybrid TTL  anchester Encoder. It is TTL- and CMOS-compatible, capable of driving ten 74LS-type loads. It is offered in standard 8-pin and 14-pin auto- insertable DIPs and space saving surface mount 8-pin and 14-pin SOICs.