JFET P-Ch Junc FET
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Transistor Polarity : | N-Channel | Gate-Source Breakdown Voltage : | 30 V |
Configuration : | Single | Mounting Style : | Through Hole |
Package / Case : | TO-18 |
Gate-Drain or Gate-Source Voltage . . . . . . . . . . . . . . . . . 30V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Storage Temperature Range . . . . . . . . . . . . . -65 to +200
Operating Temperature Range . . . . . . . . . . . -55 to +200
Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mW
Derate above 25 . . . . . . . . . . . . . . . . . . . . . . . . . . . 3mW/
NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2N5116 Ideal for inverting switching or "Virtual Gnd" switching into inverting input of Op. Amp. No driver is required and ±10VAC signals can be handled using only +5V logic (TTL or CMOS).