LOGIC_TEST_PROBE_WITH_MEMORY_

Published:2009/6/25 4:13:00 Author:May

There are two switches: a memory disable switch and a pulse polarity switch. Memory disable is a push-button that resets the memory to the low state when depressed. Pulse polarity is a toggle switch that selects whether the probe responds to a high-level or pulse (+5 V) or a low-level or pulse (ground). (Use IC logic of the same type as is being tested).   (View)

View full Circuit Diagram | Comments | Reading(901)

LOGIC_PROBE

Published:2009/6/25 4:12:00 Author:May

Transistors Q1 and Q2 form a buffer, pro-viding the probe with a reasonable input impe-dance. Q3 and Q4 form a level detecting circuit.As the voltage across the base-emitter junction of the Q3 rises above 0.6 V the transistor turns on thus turning on Q4 and lighting the red (high) LED. Q5 and Q6 perform the same function but for the green (low) LED. Q1, Q4, Q5 are all PNP general purpose silicon transistors (BC178 etc). Q2, Q3, Q6 are all PNP general purpose silicon transistors (BC 108 etc.) The threshold low is≤0.8 V, and the threshold high is≥2.4 V.   (View)

View full Circuit Diagram | Comments | Reading(0)

AUDIBLE_TTL_PROBE

Published:2009/6/25 4:11:00 Author:May

When the probe is in contact with a TTL low (0) the probe emits a low note. With a TTL high (1), a high note is emitted. Power is supplied by the circuit under test.   (View)

View full Circuit Diagram | Comments | Reading(626)

100_K_MEGOHM_DC_PROBE

Published:2009/6/25 4:10:00 Author:May

A 741 op amp is used with t00% ac and dc feedback to provide a typical input impedance of 1011 ohm and unity gain. To avoid hum and rf pickup the input leads should be kept as short as possible and the circuit should be mounted in a small grounded case. Output leads may belong since the output impedance of the circuit is a fraction of an ohm. With no input the output level is indeterminate. Including RI in the cir-cuit through lowers the input impedance to 22 M.   (View)

View full Circuit Diagram | Comments | Reading(0)

RF_PROBE_FOR_VOM

Published:2009/6/25 4:09:00 Author:May

This probe makes possible relative measurements of rf voltages to 200 MHz on a 20,000 ohms-per-volt multimeter．Rf voltage must not exceed the breakdown rating of the IN4149-approximately 100 V.   (View)

View full Circuit Diagram | Comments | Reading(0)

CMOS_LOGIC_PROBE

Published:2009/6/25 4:07:00 Author:May

The logic probe can indicate four input states, as follows: floating input-all LEDs off; logic 0 input-D2 switched on (D3 will briefly flash on); logic 1 input-Dl switched on; pulsing input-D3 switched on, or pulsing in the case of a low frequency input signal (one or both of the other indicators will switch on, showing if one input state predominates).   (View)

View full Circuit Diagram | Comments | Reading(0)

INJECTOR_TRACER

Published:2009/6/25 4:06:00 Author:May

The unit has a separate amplifier and oscillator section allowing them to be used sepa-rately if need be. The injector is a multivibrator running at 1 kHz, with R5 and R6 dividing down the output to a suitable level (≈1V). The tracer is a single-stage amplifier that drives the high impedance earpiece. C4 decouples the input.   (View)

View full Circuit Diagram | Comments | Reading(0)

SIGNAL_INJECTOR_TRACER

Published:2009/6/25 4:04:00 Author:May

The injector is a CMOS oscillator with period approximately equal to 1.4 x C1 x R2 seconds. The values are given for 1 kHz opera-tion. Resistors R3 and R4 divide the output to 1 V. Whereas the oscillator employs the gates in their digital mode, the tracer used them in a linear fashion by applying negative feedback from output to input. They are used in much the same way as op amps. The circuit uses positiveground. It offers an advantage at the earphone output because one side of the earphone must be connected to ground via the case. Use of a positive ground allows the phone to be driven by the two N-channel transistors inside the CD4001 which are arranged in parallel and are thus able to handle more current for better volume.   (View)

View full Circuit Diagram | Comments | Reading(0)

LOGIC_PROBE_YIELDS_THREE_DISCRETE_STATES

Published:2009/6/25 4:02:00 Author:May

The circuit uses a dual LED. When power is applied to the probe through the power leads, and the input is touched to a low level or ground, Q1 is cut off. This will cause Q2 to conduct since the base is positive with respect to the emitter. With Q1 cut off and Q2 con-ducting, the greendiode ofthe dual LED will be forward biased, yielding a green output.Touching the probe tip to a high level will cause Q1 and Q2 to complement, and the red diode will be forward biased, yielding a red output from the LED. An alternating signal will cause alternating conduction of the red and green diodes and willyield an indication approxi-mately amber. In this manner, both static and dynamic signals can be traced with the logic probe.   (View)

View full Circuit Diagram | Comments | Reading(0)

PROGRAMMABLE_GATE

Published:2009/6/25 3:10:00 Author:May

This gate converts an AND gate or an OR gate by applying a logic '1' on the function input. The logic design uses 8 two-input NAND gates. The number of gates may be reduced by replacing the 5 NAND gates enclosed by the dotted line with a two-input exclusive-OR, such as the TTL 7486.   (View)

View full Circuit Diagram | Comments | Reading(824)

LIGHT_ACTIVATED_LOGIC_CIRCUITS

Published:2009/6/25 3:04:00 Author:May

These circuits illustrate some of the common logic functions that can be implemented.   (View)

View full Circuit Diagram | Comments | Reading(717)

TONE_ALERT_DECODER

Published:2009/6/25 2:51:00 Author:May

Circuit Notes PLL (U1) is set with R2 to desired tone frequency. LED lights to indicate lock-up of PLL. Reduce signal level (R1) and readJust R2 to assure lock-up. Delay is selected from counter U3 output. Circuits latches (turns on Q1 to allow audio to speaker) when proper frequency/duration signal is received. To reset latch, a positive voltage must be applied briefly to the R input of U4.   (View)

View full Circuit Diagram | Comments | Reading(777)

PICOAMPERE_TO_VOLTAGE_COMVERTER_WITH_GAIN

Published:2009/6/25 2:43:00 Author:May

  (View)

View full Circuit Diagram | Comments | Reading(658)

INDUCTORLESS_SWITCHING_REGULATOR

Published:2009/6/25 2:37:00 Author:May

In conventional applications, switching-regulator ICs regulate 6,, by controlling the current through an external inductor. The IC in A, however, driving a diode-capacitor network in place of the inductor, offers comparable performance for small loads. The network can double, triple, or quadru-ple the input voltage. Feedback from the R1/R2 voltage divider enables IC1 to set the regulated-output level. (As shown, the circuit derives 12 V from a 5- to 12-V input and provides as much as 2 mA of output cur-rent.) Adding a noninverting MOS driver (B) boosts the available output current to 20 mA. Substi-tuting the diode-capacitor network shown for an inductor allows this switching-regulator IC to deliver 2 mA at comparable line and load regulation, with somewhat reduced efficiency.   (View)

View full Circuit Diagram | Comments | Reading(707)

HIGH_IMPEDANCE_PRECISION_RECTIFIER_FOR_AC_DC_CONVERTER

Published:2009/6/25 2:18:00 Author:May

  (View)

View full Circuit Diagram | Comments | Reading(632)

SHIFT_REGISTER

Published:2009/6/25 2:17:00 Author:May

The shift pulse amplitude is less than 15 volts. If a stage is off，the shift pulse will not becoupled to the next stage，If it is on，the diode will conduct and trigger the next stage.Just prior to the shift pulse the anode supply is interrupted to turn off all stages.The stored capacitor charge determines which stages will be triggered，   (View)

View full Circuit Diagram | Comments | Reading(0)

CURRENT_TO_VOLTAGE_CONVERTER

Published:2009/6/25 2:12:00 Author:May

Converter features eight decades of cur-rent range. The circuit is intended to be used with the 200.0 mV range of a DVM.   (View)

View full Circuit Diagram | Comments | Reading(0)

RESISTANCE_TO_VOLTAGE_CONVERTER

Published:2009/6/25 2:08:00 Author:May

Circuit will measure accurateiy to 20 M when associated with a buffer amplifier (A1) having a low input bias current (IIN) ＜ 30 nA). The circuit uses two of the three amplifiers contained in the Siliconix L144 micropower triple op amp.   (View)

View full Circuit Diagram | Comments | Reading(1401)

PICOAMPERE_TO_FREQUENCY_CONVERTERS

Published:2009/6/25 2:03:00 Author:May

  (View)

View full Circuit Diagram | Comments | Reading(490)

100_kHz_CRYSTAL_CALIBRATOR

Published:2009/6/25 Author:May

Circuit Notes This circuit is often used by amateur radio operations, shortwave listeners, and other operators of shortwave receivers to calibrate the dial pointer. The oscillator operates at a fundamental frequency of 100 kHz, and the harmonics are used to locate points on the shortwave dial, provided that the output of the calibrator is coupled to the antenna circuit of the receiver. The crystal shunts the feedback voltage divider, and is in series with a variable capacitor (C3) that is used to set the actual operating frequency of the calibrator.   (View)

View full Circuit Diagram | Comments | Reading(1)

Pages:333/471 At 20321322323324325326327328329330331332333334335336337338339340Under 20