W925E240F, W925E625, W925EP01F Selling Leads, Datasheet
MFG:NUVOTON Package Cooled:QFP D/C:08+
W925E240F, W925E625, W925EP01F Datasheet download
Part Number: W925E240F
MFG: NUVOTON
Package Cooled: QFP
D/C: 08+
W925E240F, W925E625, W925EP01F
- Table of contents:
Info of W925E240F
Info of W925E625
Info of W925EP01F
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About W921E400
PDF/DataSheet Download
Datasheet: W921E400
File Size: 404045 KB
Manufacturer: WINBOND [Winbond]
Download : Click here to Download
About W925E625
PDF/DataSheet Download
Datasheet: W925E625
File Size: 1081055 KB
Manufacturer: Winbond
Download : Click here to Download
About W921E400
PDF/DataSheet Download
Datasheet: W921E400
File Size: 404045 KB
Manufacturer: WINBOND [Winbond]
Download : Click here to Download
W925E625 General Description
The W925E/C625 is an all-in-1 single 8-bit micro-controller with widely used Calling Identity Delivery (CID) function. The 8-bit CPU core is based on the 8051 family; therefore, all the instructions are compatible to the Turbo 8051 series. The CID part consists FSK decoder, DTMF receiver, CPE* Alert Signal (CAS) detector and Ring detector. Also built-in DTMF generator and FSK generator with baud rate 1200 bps (bits/sec). Using W925E/C625 can easily implement the CID adjunct box and the feature phone or Short Message Service (SMS) phone with CID function. The main features are listed in the next section.
W925E625 Features
` APPLICATION: The SMS phone with CID function and CID adjunct box.
` CPU: 8-bit micro-controller is similar to the 8051 family.
- Operating voltage: C: 2.2 to 5.5 volt. CID: 3.0 to 5.5 volt.
` Dual-clock operation:
- Main oscillator: 3.58MHz crystal for CID and DTMF function. And built-in RC oscillator.
- Sub oscillator: 32768Hz crystal.
- Main and sub oscillators are enable/disable by bit control individually.
` ROM: 64K bytes internal flash EEPROM/MASK ROM type.
- up 64K bytes for program ROM.
- total 64K bytes for look-up table ROM.
` RAM:
- 256 bytes on chip scratch-pad RAM.
- 4K bytes on chip RAM for MOVX instruction.
- 224 bytes on chip LCD RAM.
` LCD: dot matrix control method.
- 1792 dots: 56 Segments x 32 Common, 1/5 bias.
` CID:
- Compatible with Bellcore TR-NWT-000030 & SR-TSV-002476, British Telecom(BT) SIN227, U.K. Cable Communication Association(CCA) specification.
- FSK modulator/demodulator: for Bell 202 and ITU-T V.23 FSK with 1200 baud rate.
- CAS detector: for dual tones of Bellcore CAS and BT Idle State and Loop State Dual Tone Alert Signal (DTAS).
- DTMF generator/receiver; DTMF receiver can be programmed as a tone detector.
- Ring detector: for line reversal for BT, ring burst for CCA or ring signal for Bellcore.
- Two independent OP amps with adjustable gain for Tip/Ring and Telephone Hybrid connections.
` I/O: 40 I/O pins.
- P0: Bit and byte addressable. I/O mode can be bit controlled. Open drain type.
- P1~P3: Bit and byte addressable. Pull high and I/O mode can be bit controlled.
- P4 : Byte addressable . Pull high and I/O mode can be bit controlled.
` Power mode:
- Normal mode: Normal operation
- Dual-clock slow operation mode: System is operated by the sub-oscillator (Fosc=Fs and Fm is stopped)
- Idle mode: CPU hold. The clock to the CPU is halted, but the interrupt, timer and watchdog timer block work normally but CID function is disabled.
- Power down mode: All activity is completely stopped and power consumption is less than 1 A.
` Timer: 2 13/16-bit timers, or 8-bit auto-reload timers, that are Timer0 and Timer1.
` Watchdog timer: WDT can be programmed by the user to serve as a system monitor.
` Interrupt: 11 interrupt sources with two levels of priority.
- 4 interrupts from INT0, INT1, INT2 and INT3.
- 2 interrupts from Timer0, Timer1.
- 1 interrupt from Serial port.
- 1 interrupt from CID.
- 1 interrupt from 13/14-bit Divider.
- 1 interrupt from Comparator.
- 1 interrupt from Watch Dog Timer.
` Divider: 13/14 bit divider, clock source from sub-oscillator, therefore, DIVF set every 0.25/0.5 Sec.
` Comparator:
- Comparator: 1 analog inputs from VNEG pin, 2 reference input pins, one is from VPOS pin and another is from internal 1.0v regulator output.
` Serial port:
- An 8-bit serial transceiver with SCLK and SDATA.
.• Package:
- 160pin QFP
` CPU: 8-bit micro-controller is similar to the 8051 family.
- Operating voltage: C: 2.2 to 5.5 volt. CID: 3.0 to 5.5 volt.
` Dual-clock operation:
- Main oscillator: 3.58MHz crystal for CID and DTMF function. And built-in RC oscillator.
- Sub oscillator: 32768Hz crystal.
- Main and sub oscillators are enable/disable by bit control individually.
` ROM: 64K bytes internal flash EEPROM/MASK ROM type.
- up 64K bytes for program ROM.
- total 64K bytes for look-up table ROM.
` RAM:
- 256 bytes on chip scratch-pad RAM.
- 4K bytes on chip RAM for MOVX instruction.
- 224 bytes on chip LCD RAM.
` LCD: dot matrix control method.
- 1792 dots: 56 Segments x 32 Common, 1/5 bias.
` CID:
- Compatible with Bellcore TR-NWT-000030 & SR-TSV-002476, British Telecom(BT) SIN227, U.K. Cable Communication Association(CCA) specification.
- FSK modulator/demodulator: for Bell 202 and ITU-T V.23 FSK with 1200 baud rate.
- CAS detector: for dual tones of Bellcore CAS and BT Idle State and Loop State Dual Tone Alert Signal (DTAS).
- DTMF generator/receiver; DTMF receiver can be programmed as a tone detector.
- Ring detector: for line reversal for BT, ring burst for CCA or ring signal for Bellcore.
- Two independent OP amps with adjustable gain for Tip/Ring and Telephone Hybrid connections.
` I/O: 40 I/O pins.
- P0: Bit and byte addressable. I/O mode can be bit controlled. Open drain type.
- P1~P3: Bit and byte addressable. Pull high and I/O mode can be bit controlled.
- P4 : Byte addressable . Pull high and I/O mode can be bit controlled.
` Power mode:
- Normal mode: Normal operation
- Dual-clock slow operation mode: System is operated by the sub-oscillator (Fosc=Fs and Fm is stopped)
- Idle mode: CPU hold. The clock to the CPU is halted, but the interrupt, timer and watchdog timer block work normally but CID function is disabled.
- Power down mode: All activity is completely stopped and power consumption is less than 1 A.
` Timer: 2 13/16-bit timers, or 8-bit auto-reload timers, that are Timer0 and Timer1.
` Watchdog timer: WDT can be programmed by the user to serve as a system monitor.
` Interrupt: 11 interrupt sources with two levels of priority.
- 4 interrupts from INT0, INT1, INT2 and INT3.
- 2 interrupts from Timer0, Timer1.
- 1 interrupt from Serial port.
- 1 interrupt from CID.
- 1 interrupt from 13/14-bit Divider.
- 1 interrupt from Comparator.
- 1 interrupt from Watch Dog Timer.
` Divider: 13/14 bit divider, clock source from sub-oscillator, therefore, DIVF set every 0.25/0.5 Sec.
` Comparator:
- Comparator: 1 analog inputs from VNEG pin, 2 reference input pins, one is from VPOS pin and another is from internal 1.0v regulator output.
` Serial port:
- An 8-bit serial transceiver with SCLK and SDATA.
.• Package:
- 160pin QFP
W925E625 Connection Diagram
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