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VIC064NC, VIC068A, VIC068A/F11-BC

Table of contents:
Info of VIC064NC
Info of VIC068A
Info of VIC068A/F11-BC

VIC064NC, VIC068A, VIC068A/F11-BC Selling Leads, Datasheet

MFG:CYPRESS Package Cooled:03 D/C:3

VIC064NC, VIC068A, VIC068A/F11-BC Picture

VIC064NC, VIC068A, VIC068A/F11-BC Datasheet download

Five Points

Part Number: VIC064NC

MFG: CYPRESS

Package Cooled: 03

D/C: 3

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VIC068A General Description

The VMEbus interface controller (VIC068A) is a single chip designed to minimize the cost and board area requirements and to maximize performance of the VMEbus interface of a VMEbus master/slave module. This can be implemented on VIC068A either an 8-bit, 16-bit, or 32-bit VMEbus system. The VIC068A performs all VMEbus system controller functions plus many others, which simplify the development of VIC068Aa VMEbus interface. The VIC068A utilizes patented on-chip output buffers. These CMOS high-drive buffers provide direct connection to the address and data lines. In addition to these signals, the VIC068A connects directly to the arbitration,interrupt, address modifier, utility and strobe lines.Signals are provided which control data direction and latch functions needed for a 32-bit implementation.

The VIC068A was developed through the efforts of a consortium of board vendors, under the auspices of the VMEbus International Trade Association (VITA). The VIC068A thus insures compatibility between boards designed by different manufacturers.

VIC068A Features

• Complete VMEbus interface controller and arbiter
-58 internal registers provide configuration control and status of VMEbus and local operations
-Drives arbitration, interrupt, address modifier utility,strobe, address lines A07 through A01 and data lines D07 through D00 directly, and provides signals for control logic to drive remaining address and date lines
-Direct connection to 68xxx family and mappable to non-68xxx processors

• Complete master/slave capability
-Supports read, write, write posting, and block transfers
-Accommodates VMEbus timing requirements with internal digital delay line (1¤ 2-clock granularity)
-Programmable metastability delay
-Programmable data acquisition delays
-Provides timeout timers for local bus and VMEbus transactions

• Interleaved block transfers over VMEbus
-Acts as DMA master on local bus
-Programmable burst count, transfer length, and interleaved period interval
- Supports local module-based DMA

• Arbitration support
-Supports single-level, priority and round robin arbitration
-Supports fair request option as requester

• Interrupt support
-Complete support for the VMEbus interrupts: interrupter and interrupt handler

VIC068A Connection Diagram

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