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UPSD3253B-40T6, UPSD3253BV-24T6, UPSD3254A

Table of contents:
Info of UPSD3253B-40T6
Info of UPSD3253BV-24T6
Info of UPSD3254A

UPSD3253B-40T6, UPSD3253BV-24T6, UPSD3254A Selling Leads, Datasheet

MFG:STMicroelectronics Category:Integrated Circuits (ICs) Package Cooled:2300 D/C:05+

UPSD3253B-40T6, UPSD3253BV-24T6, UPSD3254A Datasheet download

Five Points

Part Number: UPSD3253B-40T6

Category: Integrated Circuits (ICs)

MFG: STMicroelectronics

Package Cooled: 2300

D/C: 05+

Description: IC FLASH/MCU 256K 52 TQFP

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UPSD3253B-40T6 Parameters

Technical/Catalog Information	UPSD3253B-40T6
Vendor	STMicroelectronics
Category	Integrated Circuits (ICs)
Program Memory Size	160KB (160K x 8)
RAM Size	32K x 8
Number of I /O	37
Package / Case	52-TQFP
Speed	40MHz
Controller Series	PSD
Oscillator Type	Internal
Packaging	Tray
Program Memory Type	FLASH
EEPROM Size	-
Core Processor	8032
Data Converters	A/D 4x8b
Core Size	8-Bit
Operating Temperature	-40°C ~ 85°C
Connectivity	I²C, UART/USART
Peripherals	LVD, POR, PWM, WDT
Voltage - Supply (Vcc/Vdd)	4.5 V ~ 5.5 V
Drawing Number	*
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	UPSD3253B 40T6 UPSD3253B40T6 497 2374 ND 4972374ND 497-2374

UPSD3253BV-24T6 Parameters

Technical/Catalog Information	UPSD3253BV-24T6
Vendor	STMicroelectronics
Category	Integrated Circuits (ICs)
Program Memory Size	160KB (160K x 8)
RAM Size	32K x 8
Number of I /O	37
Package / Case	52-TQFP
Speed	24MHz
Controller Series	PSD
Oscillator Type	Internal
Packaging	Tray
Program Memory Type	FLASH
EEPROM Size	-
Core Processor	8032
Data Converters	A/D 4x8b
Core Size	8-Bit
Operating Temperature	-40°C ~ 85°C
Connectivity	I²C, UART/USART
Peripherals	LVD, POR, PWM, WDT
Voltage - Supply (Vcc/Vdd)	3 V ~ 3.6 V
Drawing Number	*
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	UPSD3253BV 24T6 UPSD3253BV24T6 497 2375 ND 4972375ND 497-2375

UPSD3254A General Description

Dual bank Flash memories
      Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates
       Large 128KByte or 256KByte main Flash memory for application code, operating systems, or bit maps for graphic user interfaces
      Large 32KByte secondary Flash memory divided in small sectors. Eliminate external EEPROM with software EEPROM emulation
      Secondary Flash memory is large enough for sophisticated communication protocol (USB) during IAP while continuing critical system tasks
Large SRAM with battery back-up option
      32KByte SRAM for RTOS, high-level languages, communication buffers, and stacks
Programmable Decode PLD for flexible address mapping of all memories
     Place individual Flash and SRAM sectors on any address boundary
     Built-in page register breaks restrictive 8032 limit of 64KByte address space
     Special register swaps Flash memory segments between 8032 "program" space and "data" space for efficient In-Application Programming
High-speed clock standard 8032 core (12-cycle)
     40MHz operation at 5V, 24MHz at 3.3V
     2 UARTs with independent baud rate, three 16-bit Timer/Counters and two External Interrupts
USB Interface (some devices only)
     Supports USB 1.1 Slow Mode (1.5Mbit/s)
     Control endpoint 0 and interrupt endpoints 1 and 2
I²C interface for peripheral connections
     Capable of master or slave operation
5 Pulse Width Modulator (PWM) channels
     Four 8-bit PWM units
     One 8-bit PWM unit with programmable period
4-channel, 8-bit Analog-to-Digital Converter (ADC) with analog supply voltage (VREF)
Standalone Display Data Channel (DDC)
     For use in monitor, projector, and TV applications
     Compliant with VESA standards DDC1 and DDC2B
     Eliminate external DDC PROM
Six I/O ports with up to 46 I/O pins
     Multifunction I/O: GPIO, DDC, I²C, PWM, PLD I/O, supervisor, and JTAG
     Eliminates need for external latches and logic
3000 gate PLD with 16 macrocells
     Create glue logic, state machines, delays,etc.
     Eliminate external PALs, PLDs, and 74HCxx
     Simple PSDsoft Express software...Free
Supervisor functions
     Generates reset upon low voltage or watchdog time-out. Eliminate external supervisor device
     RESET Input pin; Reset output via PLD
In-System Programming (ISP) via JTAG
     Program entire chip in 10 - 25 seconds with no involvement of 8032
     Allows efficient manufacturing, easy product testing, and Just-In-Time inventory
     Eliminate sockets and pre-programmed parts
     Program with FlashLINK^TM cable and any PC
Content Security
     Programmable Security Bit blocks access of device programmers and readers
Zero-Power Technology
     Memories and PLD automatically reach standby current between input changes
Packages
     52-pin TQFP
     80-pin TQFP: allows access to 8032 address/data/control signals for connecting to external peripherals

UPSD3254A Maximum Ratings

Symbol	Parameter	Min.	Max.	Unit
T_STG	Storage Temperature	65	125
T_LEAD	Lead Temperature during Soldering (20 seconds max.)⁽¹⁾		235
V_IO	Input and Output Voltage (Q = V_OH or Hi-Z)	0.5	6.5	V
V_CC	Supply Voltage	0.5	6.5	V
V_PP	Device Programmer Supply Voltage	0.5	14.0	V
V_ESD	Electrostatic Discharge Voltage (Human Body Model) ²	2000	2000	V

UPSD3254A Features

The uPSD325X devices combine a Flash PSD architecture with an 8032 microcontroller core. The uPSD325X devices of Flash PSDs feature dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, ADC, DDC and PWM channels, and an on-board 8032 microcontroller core, with two UARTs, three 16-bit Timer/Counters and two External Interrupts. As with other Flash PSD families, the uPSD325X devices are also in-system programmable (ISP) via a JTAG ISP interface.
Large 32KByte SRAM with battery back-up option
Dual bank Flash memories
   128KByte or 256KByte main Flash memory
   32KByte secondary Flash memory
Content Security
   Block access to Flash memory
Programmable Decode PLD for flexible address mapping of all memories within 8032 space.
High-speed clock standard 8032 core (12-cycle)
USB Interface (some devices only)
I2C interface for peripheral connections
5 Pulse Width Modulator (PWM) channels
Analog-to-Digital Converter (ADC)
Standalone Display Data Channel (DDC)
Six I/O ports with up to 46 I/O pins
3000 gate PLD with 16 macrocells
Supervisor functions with Watchdog Timer
In-System Programming (ISP) via JTAG
Zero-Power Technology
Single Supply Voltage
    4.5 to 5.5V
    3.0 to 3.6V

UPSD3254A Connection Diagram

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