TVP3025 Maximum Ratings
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VDD + 0.5 V
Analog output short-circuit duration to any power supply or common . . . . . . . . . .unlimited
Operating free-air temperature, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65°C to 150°C
Junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175°C
Case temperature for 10 seconds: PCE package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . 260°C
TVP3025 Features
• 64-Bit-Wide Multiplexing Pixel Bus
• Compatible with the S3 Vision964 and 86C928
• Brooktree BT485 Register Map Emulation
• Supports System Resolutions of:
1600 * 1280 * 1, 2, 4, 8, 16, 24 Bits/Pixel @ 60-Hz, 72, and 76-Hz Refresh Rate
1536 * 1152 * 1, 2, 4, 8, 16, 24 Bits/Pixel @ 60-Hz, and 72-Hz and Higher Refresh Rates
1280 * 1024 * 1, 2, 4, 8, 16, 24 Bits/Pixel @ 60-Hz and 72-Hz and Higher Refresh Rates
1024 * 768 * 1, 2, 4, 8, 16, 24 Bits/Pixel @ 60-Hz and 72-Hz and Higher Refresh Rates
And Lower Resolutions
• Direct-Color Modes:
24-Bit/Pixel with 8-Bit Overlay
16-Bit/Pixel (5, 6, 5) XGA Configuration
16-Bit/Pixel (6, 6, 4) Configuration
15-Bit/Pixel With 1 Bit Overlay (5, 5, 5, 1) TARGA Configuration
12-Bit/Pixel With 4 Bit Overlay (4, 4, 4, 4)
• True-Color Modes:
24-Bit/Pixel With Gamma Correction
16-Bit/Pixel (5, 6, 5) XGA Configuration With Gamma Correction
16-Bit/Pixel (6, 6, 4) Configuration with Gamma Correction
15-Bit/Pixel (5, 5, 5) TARGA Configuration With Gamma Correction
12-Bit/Pixel (4, 4, 4) With Gamma Correction
• RCLK/SCLK/LCLK Data Latching Mechanism Allows Flexible Control of VRAM Timing
• Direct Interfacing to Video RAM
• Support for Split Shift Register Transfers
• 135-, 175-, and 220-MHz Versions
• Integrated Pixel Clock and Memory Clock PLLs
• On-Chip Hardware Cursor:
64 * 64 * 2 Cursor (XGA Functionally Compatible)
Full-Window Crosshair
Dual-Cursor Mode
• On-Chip Clock Selection
• Supports Overscan for Creation of Custom Screen Borders
• Versatile Pixel Bus Interface Supports Little- and Big-Endian Data Formats
• Windowed Overlay and VGA Capability
• Color-Keyed Switching of Direct Color and Overlay
• Horizontal Zooming Capability
• Triple 8-Bit D/A Converters
• Analog Output Comparators
• Triple 256 * 8 Color Palette RAMs
• RS-343A Compatible Outputs
• Direct VGA Pass-Through Capability
• Palette Page Register
• Software Downward Compatible With IMSG176/8 and Bt476/8
• EPIC 0.8-mm CMOS Process