TTQS9740, TTRA9741, TTRN0110G Selling Leads, Datasheet
MFG:18 Package Cooled:TO D/C:94
TTQS9740, TTRA9741, TTRN0110G Datasheet download
Part Number: TTQS9740
MFG: 18
Package Cooled: TO
D/C: 94
TTQS9740, TTRA9741, TTRN0110G
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Info of TTQS9740
Info of TTRA9741
Info of TTRN0110G
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About TTRN0110G
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Datasheet: TTRN0110G
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About TTRN0110G
PDF/DataSheet Download
Datasheet: TTRN0110G
File Size: 592013 KB
Manufacturer:
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TTRN0110G General Description
The Agere Systems Inc. TTRN0110G device provides a 16:1 multiplexer, accepts 16 differential LVDS data inputs and a 155.52 MHz or 622.08 MHz reference clock, and generates a CML 10 Gbits/s clock and data output. Both forward directional and contradirectional clocking schemes are supported for transferring data across the parallel interface. When contraclocking is used, the TTRN0110G provides one of four phases of a 622.08 MHz clock output back upstream to the data chip. The device also supports a clockless parallel data transfer mode. The TTRN0110G can be operated within the standard OC-192/STM-64 data rate of 9.9532 GHz and the FEC rate of 10.7092 Gbits/s.
TTRN0110G Maximum Ratings
| Parameter | Min | Max | Unit |
| Power Supply Voltage (VCC) | GND0.5 | VCC + 0.5 | V |
| Storage Temperature | 40 | 125 | °C |
| Pin Voltage | GND0.5 | VCC + 0.5 | V |
TTRN0110G Features
` Supports standard OC-192/STM-64 data rate of 9.95328 Gbits/s up through forward error correction (FEC) rate of 10.7092 Gbits/s as well as the Ethernet rate of 10.3125 Gbits/s
` Supports clockless data transfer mode
` Supports forward directional clocking for parallel transfer of input data with 311 MHz or 622 MHz clocks
` Supports contradirectional clocking for parallel transfer of input data based on a 622 MHz output clock
` Allows a 155.52 MHz or 622.08 MHz reference clock using common phase-locked loop (PLL) loop components
` Additional 10 Gbits/s current-mode logic (CML) serial data output for system loopback
` Supports 10 GHz clock output for clocked laser driver applications
` Loss of lock indication
` Single 3.3 V supply
` Low-voltage differential signaling (LVDS) 622.08 Mbits/s signal I/Os
` CMOS I/Os compatible with low-voltage transistortransistor logic (LVTTL) signaling
` Power dissipation as low as 1.35 W
` Available in a 198-ball grid array (CBGA) package
` Jitter generation/transfer compliant with the following:
-Telcordia Technologies™ GR-253 CORE
-ITU-T G.825
-ITU-T G.958
` Supports clockless data transfer mode
` Supports forward directional clocking for parallel transfer of input data with 311 MHz or 622 MHz clocks
` Supports contradirectional clocking for parallel transfer of input data based on a 622 MHz output clock
` Allows a 155.52 MHz or 622.08 MHz reference clock using common phase-locked loop (PLL) loop components
` Additional 10 Gbits/s current-mode logic (CML) serial data output for system loopback
` Supports 10 GHz clock output for clocked laser driver applications
` Loss of lock indication
` Single 3.3 V supply
` Low-voltage differential signaling (LVDS) 622.08 Mbits/s signal I/Os
` CMOS I/Os compatible with low-voltage transistortransistor logic (LVTTL) signaling
` Power dissipation as low as 1.35 W
` Available in a 198-ball grid array (CBGA) package
` Jitter generation/transfer compliant with the following:
-Telcordia Technologies™ GR-253 CORE
-ITU-T G.825
-ITU-T G.958
TTRN0110G Typical Application
·SONET/SDH optical modules
·SONET/SDH line origination equipment
·SONET/SDH add/drop multiplexers
·SONET/SDH cross connects
·SONET/SDH test equipment
·Digital video transmission
·SONET/SDH line origination equipment
·SONET/SDH add/drop multiplexers
·SONET/SDH cross connects
·SONET/SDH test equipment
·Digital video transmission
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