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TPIC6B595DWRG4, TPIC6B595N, TPIC6B596

Table of contents:
Info of TPIC6B595DWRG4
Info of TPIC6B595N
Info of TPIC6B596

TPIC6B595DWRG4, TPIC6B595N, TPIC6B596 Selling Leads, Datasheet

MFG:Texas Instruments Category:Integrated Circuits (ICs) Package Cooled:20SOIC/-40~125 D/C:09+

TPIC6B595DWRG4, TPIC6B595N, TPIC6B596 Datasheet download

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Part Number: TPIC6B595DWRG4

Category: Integrated Circuits (ICs)

MFG: Texas Instruments

Package Cooled: 20SOIC/-40~125

D/C: 09+

Description: IC PWR 8-BIT SHIFT REGIS 20-SOIC

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TPIC6B595DWRG4 Parameters

Technical/Catalog Information	TPIC6B595DWRG4
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Logic Type	Shift Register
Function	Serial to Parallel
Number of Elements	1 - Single
Number of Bits per Element	8
Output Type	Standard
Voltage - Supply	4.5 V ~ 5.5 V
Mounting Type	Surface Mount
Package / Case	20-SOIC (7.5mm Width)
Packaging	Tape & Reel (TR)
Operating Temperature	-40°C ~ 125°C
Drawing Number	296; 4040000-4; DW; 20
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	TPIC6B595DWRG4 TPIC6B595DWRG4

TPIC6B596 General Description

The TPIC6B596 is a monolithic, high-voltage, medium-current power 8-bit shift register designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other mediumcurrent or high-voltage loads.

This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shiftregister clear (SRCLR) is high. When SRCLR is low, all registers in the device are cleared. When output enable (G) is held high, all data in the
output buffers is held low and all drain outputs are off. When G is held low, data from the storage register is transparent to the output buffers. When data in the output buffers is low, the DMOStransistor outputs are off. When data is high, the DMOS-transistor outputs have sink-current capability. The serial output (SER OUT) is clocked out of the device on the falling edge of SRCK to provide additional hold time for cascaded applications. This will provide improved performance for applications where clock signals may be skewed, devices are not located near one another, or the system must tolerate electromagnetic interference.

Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and 150-mA continuous sinkcurrent capability. Each output provides a 500-mA typical current limit at TC = 25°C. The current limit decreases as the junction temperature increases for additional device protection.

The TPIC6B596 is characterized for operation over the operating case temperature range of 40°C to 125°C.

TPIC6B596 Maximum Ratings

Logic supply voltage, V_CC(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Logic input voltage range, V_I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 7 V
Power DMOS drain-to-source voltage, V_DS(see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 V
Continuous source-to-drain diode anode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mA
Pulsed source-to-drain diode anode current (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . ..1A
Pulsed drain current, each output, all outputs on, I_D, T_C = 25°C (see Note 3) . . . . . . . . 500mA
Continuous drain current, each output, all outputs on, I_D, T_C= 25°C . . . . . . . . . . . . . . .150 mA
Peak drain current single output, T_C= 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . 500mA
Single-pulse avalanche energy, E_AS (see Figure 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mJ
Avalanche current, I_AS(see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .500 mA
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, T_J . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 150°C
Operating case temperature range, T_C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40°C to 125°C
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . .260°C

TPIC6B596 Features

Low r_DS(on) ...5
Avalanche Energy ...30 mJ
Eight Power DMOS-Transistor Outputs of150-mA Continuous Current
500-mA Typical Current-Limiting Capability
Output Clamp Voltage . . . 50 V
Enhanced Cascading for Multiple Stages
All Registers Cleared With Single Input
Low Power Consumption

TPIC6B596 Connection Diagram

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