TC74AC175F, TC74AC175F-EL, TC74AC175FN Selling Leads, Datasheet
MFG:TOSHIBA Package Cooled:SOP5.2 D/C:09+
TC74AC175F, TC74AC175F-EL, TC74AC175FN Datasheet download
Part Number: TC74AC175F
MFG: TOSHIBA
Package Cooled: SOP5.2
D/C: 09+
TC74AC175F, TC74AC175F-EL, TC74AC175FN
- Table of contents:
Info of TC74AC175F
Info of TC74AC175F-EL
Info of TC74AC175FN
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About TC74AC175F
PDF/DataSheet Download
Datasheet: TC74AC175F
File Size: 302077 KB
Manufacturer: TOSHIBA [Toshiba Semiconductor]
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About TC70
PDF/DataSheet Download
Datasheet: TC70
File Size: 92092 KB
Manufacturer: TELCOM [TelCom Semiconductor, Inc]
Download : Click here to Download
About TC74AC175FN
PDF/DataSheet Download
Datasheet: TC74AC175FN
File Size: 302077 KB
Manufacturer: TOSHIBA [Toshiba Semiconductor]
Download : Click here to Download
TC74AC175F General Description
The TC74AC175 is an advanced high speed CMOS QUAD D-TYPE FLIP FLOP fabricated with silicon gate and double-layer metal wiring C2MOS technology.
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.
These four flip-flops are controlled by a clock input (CK) and a clear input (CLR ).
The information data applied to the D inputs (D1 thru D4) are transferred to the outputs (Q1 thru Q4 and Q1 thru Q4 ) on the positive-going edge of the clock pulse.
Reset function is accomplished when the clear input is taken low, and all Q outputs are kept in low level regardless of other input conditions.
All inputs are equipped with protection circuits against static discharge or transient excess voltage
TC74AC175F Maximum Ratings
| Characteristics |
Symbol |
Rating |
Unit |
| Supply voltage range |
VCC |
−0.5 to 7.0 |
V |
| DC input voltage |
VIN |
−0.5 to VCC + 0.5 |
V |
| DC output voltage |
VOUT |
−0.5 to VCC + 0.5 |
V |
| Input diode current |
IIK |
±20 |
mA |
| Output diode current |
IOK |
±50 |
mA |
| DC output current |
IOUT |
±50 |
mA |
| DC VCC/ground current |
ICC |
±200 |
mA |
| Power dissipation |
PD |
500 (DIP) (Note 2)/180 (SOP/TSSOP) |
mW |
| Storage temperature |
Tstg |
−65~150 |
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC erformance or even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/Derating Concept and Methods) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta = −40 to 65. From Ta = 65 to 85 a derating factor of −10 mW/should be applied up to 300 mW.
TC74AC175F Features
• High speed: fmax = 170 MHz (typ.) at VCC = 5 V
• Low power dissipation: ICC = 8 A (max) at Ta = 25
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
Capability of driving 50
transmission lines.
• Balanced propagation delays: tpLH −∼ tpHL
• Wide operating voltage range: VCC (opr) = 2 to 5.5 V
• Pin and function compatible with 74F175
• Low power dissipation: ICC = 8 A (max) at Ta = 25
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
Capability of driving 50
transmission lines.
• Balanced propagation delays: tpLH −∼ tpHL
• Wide operating voltage range: VCC (opr) = 2 to 5.5 V
• Pin and function compatible with 74F175
TC74AC175F Connection Diagram
TC74AC175FN General Description
The TC74AC175 is an advanced high speed CMOS QUAD D-TYPE FLIP FLOP fabricated with silicon gate and double-layer metal wiring C2MOS technology.
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.
These four flip-flops are controlled by a clock input (CK) and a clear input (CLR ).
The information data applied to the D inputs (D1 thru D4) are transferred to the outputs (Q1 thru Q4 and Q1 thru Q4 ) on the positive-going edge of the clock pulse.
Reset function is accomplished when the clear input is taken low, and all Q outputs are kept in low level regardless of other input conditions.
All inputs are equipped with protection circuits against static discharge or transient excess voltage
TC74AC175FN Maximum Ratings
| Characteristics |
Symbol |
Rating |
Unit |
| Supply voltage range |
VCC |
−0.5 to 7.0 |
V |
| DC input voltage |
VIN |
−0.5 to VCC + 0.5 |
V |
| DC output voltage |
VOUT |
−0.5 to VCC + 0.5 |
V |
| Input diode current |
IIK |
±20 |
mA |
| Output diode current |
IOK |
±50 |
mA |
| DC output current |
IOUT |
±50 |
mA |
| DC VCC/ground current |
ICC |
±200 |
mA |
| Power dissipation |
PD |
500 (DIP) (Note 2)/180 (SOP/TSSOP) |
mW |
| Storage temperature |
Tstg |
−65~150 |
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC erformance or even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/Derating Concept and Methods) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta = −40 to 65. From Ta = 65 to 85 a derating factor of −10 mW/should be applied up to 300 mW.
TC74AC175FN Features
• High speed: fmax = 170 MHz (typ.) at VCC = 5 V
• Low power dissipation: ICC = 8 A (max) at Ta = 25
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
Capability of driving 50
transmission lines.
• Balanced propagation delays: tpLH −∼ tpHL
• Wide operating voltage range: VCC (opr) = 2 to 5.5 V
• Pin and function compatible with 74F175
• Low power dissipation: ICC = 8 A (max) at Ta = 25
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
Capability of driving 50
transmission lines.
• Balanced propagation delays: tpLH −∼ tpHL
• Wide operating voltage range: VCC (opr) = 2 to 5.5 V
• Pin and function compatible with 74F175
TC74AC175FN Connection Diagram
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