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These quad differential drivers are TTL input to pseudo-ECL differential output used for digital data transmission over balanced transmission lines.
The TB5D1M device is a pin and functional replace-ment for the Agere systems BDG1A and BPNGA quad differential drivers. The TB5D1M has a built-in lightning protection circuit to absorb large transitions on the transmission lines without destroying the device. When the circuit is powered down it loads the transmission line, because of the protection circuit.
The TB5D2H device is a pin and functional replace-ment for the Agere systems BDG1A and BDGLA quad differential drivers. Upon power down the TB5D2H output circuit appears as an open circuit and does not load the transmission line.
Both drivers feature a 3-state output with a third-state level of less than 0.1 V.
The packaging options available for these quad differential line drivers include a 16-pin SOIC gull-wing (DW) and a 16-pin SOIC (D) package.
Both drivers are characterized for operation from -40°C to 85°C
The logic inputs of this device include internal pull-up resistors of approximately 40 kW that are connected to VCC to ensure a logical high level input if the inputs are open circuited.
TB5D2H Maximum Ratings
UNIT
Supply voltage, VCC
0 V to 6 V
Input voltage
- 0.3 V to (VCC + 0.3 V)
ESD
Human Body Model(2)
All pins
±3 kV
Charged-Device Model(3)
All pins
±2 kV
Continuous power dissipation
See Dissipation Rating Table
Storage temperature, Tstg
-65 to 130
Junction temperature, TJ
130
Lightning surge, TB5D1M only, see Figure 6
D Package
-80 V to 100 V
DW Package
-100 V to 100 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Tested in accordance with JEDEC Standard 22, Test Method A114-A.
(3) Tested in accordance with JEDEC Standard 22, Test Method C101.
TB5D2H Features
· Functional Replacements for the Agere BDG1A, BPNGA and BDGLA · Pin-Equivalent to the General-Trade 26LS31 Device · 2.0 ns Maximum Propagation Delays · 0.15 ns Output Skew Typical Between ± Pairs · Capable of Driving 50-W Loads · 5.0-V or 3.3-V Supply Operation · TB5D1M Includes Surge Protection on Differential Outputs · TB5D2H No Line Loading When VCC = 0 · Third State Output Capability · -40°C to 85°C Operating Temp Range · ESD Protection HBM > 3 kV and CDM > 2 kV · Available in Gull-Wing SOIC (JEDEC MS-013, DW) and SOIC (D) Packages
TB5D2H Typical Application
· Digital Data or Clock Transmission Over Balanced Transmission Lines