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The SY89200U is a 2.5V precision, high-speed, integrated clock divider and LVDS fanout buffer capable of handling clocks up to 1.5GHz. Optimized for communications applications, the three independently controlled output banks are phase matched and can be configured for pass through (÷1), ÷2 or ÷4 divider ratios.
The differential input includes Micrel's unique, 3-pin input termination architecture that allows the user to interface to any differential signal (AC or DC-coupled) as small as 200mVpp without any level shifting or termination resistor networks in the signal path. The low-skew, low-jitter outputs are LVDS compatible with extremely fast rise/fall times guaranteed to be less than 150ps.
The EN (enable) input guarantees that the ÷1, ÷2 and ÷4 outputs will start from the same state without any runt pulse after an asynchronous master reset (MR) is asserted. This is accomplished by enabling the outputs after a four-clock delay to allow the counters to synchronize.
The SY89200U is part of a Micrel's Precision Edge product family. All support documentation can be found at Micrel's web site at www.micrel.com.