SE404, SE408, SE4100L Selling Leads, Datasheet
MFG:D Package Cooled:SOP D/C:08+/09+
MFG:D Package Cooled:SOP D/C:08+/09+
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Datasheet: SE401
File Size: 150223 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: SE401
File Size: 150223 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: SE4100L
File Size: 686155 KB
Manufacturer: SIGE [SiGe Semiconductor, Inc.]
Download : Click here to Download
The SE4100 is an integrated GPS receiver designed to receive the L1 signal at 1575.42MHz. The receiver has a low IF architecture, and integrates all of the amplifier, oscillator, mixer and demodulation functions.
The external component count is low, requiring just a 16.368MHz crystal and 11 passive components in its minimum configuration. This and the 24 pin LPCC package result in a very small circuit footprint, which is complemented by just 30mW operating power.
Two digitally controlled shutdown modes enable either to part to be powered down entirely or for just the 16 MHz clock supply to the baseband processor to be maintained.
A switchable gain LNA enables the SE4100 to be used with a local passive antenna or with a remote active antenna without changing the circuit configuration. The on-chip VCO and PLL generates the required LO frequency from the external 16.368MHz crystal. All of the VCO and LO chain is integrated. An image reject mixer downconverts the RF signal to a 4.092MHz IF. The integrated IF filter feeds a combiner, limiter and output latch. The output signal is a 1-bit quantized 4.092 MHz digital IF at CMOS levels.
These are stress ratings only. Exposure to stresses beyond these maximum ratings may cause permanent damage to, or affect the reliability of the device. Avoid operating the device outside the recommended operating conditions defined below.
This device is ESD sensitive. Handling and assembly of this device should be at ESD protected workstations.
Symbol |
Parameter |
Min. |
Max. |
Unit |
VCC,VDD |
Supply Voltage |
-0.3 |
+4.6 |
V |
Voltage On Any Pin With Respect To VSS except AntDetP and AntDetN Pins |
-0.3 |
VDD+0.3 |
V | |
VAntDetP, |
Voltage On AntDetP and AntDetN Pins With Respect To VSS |
-0.3 |
+6.0 |
V |
TSTG |
Storage Temperature Range |
-65 |
+150 |