SA8028, SA80286-16-N, SA8028B Selling Leads, Datasheet
MFG:PHILIPS Package Cooled:SMD D/C:08+
SA8028, SA80286-16-N, SA8028B Datasheet download
Part Number: SA8028
MFG: PHILIPS
Package Cooled: SMD
D/C: 08+
SA8028, SA80286-16-N, SA8028B
- Table of contents:
Info of SA8028
Info of SA80286-16-N
Info of SA8028B
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About SA8028
PDF/DataSheet Download
Datasheet: SA8028
File Size: 285414 KB
Manufacturer: PHILIPS [Philips Semiconductors]
Download : Click here to Download
About SA8.0
PDF/DataSheet Download
Datasheet: SA8.0
File Size: 88972 KB
Manufacturer: PANJIT [Pan Jit International Inc.]
Download : Click here to Download
About SA8.0
PDF/DataSheet Download
Datasheet: SA8.0
File Size: 88972 KB
Manufacturer: PANJIT [Pan Jit International Inc.]
Download : Click here to Download
SA8028 General Description
The SA8028 BICMOS device integrates programmable dividers, charge pumps and phase comparators to implement phaselocked loops. The device is designed to operate from 3 NiCd cells, in pocket phones, with low current and nominal 3 V supplies.
The synthesizer operates at VCO input frequencies up to 2.5 GHz. The synthesizer has fully programmable RF, IF, and reference dividers. All divider ratios are supplied via a 3-wire serial programming bus. The RF divider is a fractional-N divider with programmable integer ratios from 33 to 509 and a fractional resolution of 22 programmable bits (23 bits internal). A 2nd order sigma-delta modulator is used to achieve fractional division.
Separate power and ground pins are provided to the charge pumps and digital circuits. VDDCP must be equal to or greater than VDD. The ground pins should be externally connected to prevent large currents from flowing across the die and thus causing damage.
The charge pump current (gain) is fully programmable, while ISET is set by an external resistance at the RSET pin (refer to section 1.5, RF and IF Charge Pumps). The phase/frequency detector charge pump outputs allow for implementing a passive loop filter.
SA8028 Features
• Extremely low phase noise: L(f) = 101 dBc/Hz at 5 kHz offset at 800 MHz
• Low power
• Programmable Normal & Integral charge pump outputs: Maximum output = 10.4 mA
• Digital fractional spurious compensation
• Hardware and software power-down
• IDDsleep < 0.1 A (typ) at VDD = 3.0 V
• Seperate supply for VDD and VDDCP
• Programmable loop filter bandwidth
• Low power
• Programmable Normal & Integral charge pump outputs: Maximum output = 10.4 mA
• Digital fractional spurious compensation
• Hardware and software power-down
• IDDsleep < 0.1 A (typ) at VDD = 3.0 V
• Seperate supply for VDD and VDDCP
• Programmable loop filter bandwidth
SA8028 Typical Application
• 500 to 2500 MHz wireless equipment
• Cellular phones, all standards including:
CDMA : IS95-B,C WCDMA
3G : WCDMA / UMTS
GSM : EDGE / GPRS
TDMA : IS136 and EDGE
GAIT : GSM and TDMA
• WLAN
• Wireless PDAs
• Satellite tuners and all other high frequency equipment
• Extreme fine frequency resolution applications
• Cellular phones, all standards including:
CDMA : IS95-B,C WCDMA
3G : WCDMA / UMTS
GSM : EDGE / GPRS
TDMA : IS136 and EDGE
GAIT : GSM and TDMA
• WLAN
• Wireless PDAs
• Satellite tuners and all other high frequency equipment
• Extreme fine frequency resolution applications
SA8028 Connection Diagram
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