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S3P7324XZZ-QT84, S3P7335, S3P7335XZ2-OWR5

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Info of S3P7324XZZ-QT84
Info of S3P7335
Info of S3P7335XZ2-OWR5

S3P7324XZZ-QT84, S3P7335, S3P7335XZ2-OWR5 Selling Leads, Datasheet

MFG:samsung Package Cooled:QFP D/C:08+

S3P7324XZZ-QT84, S3P7335, S3P7335XZ2-OWR5 Picture

S3P7324XZZ-QT84, S3P7335, S3P7335XZ2-OWR5 Datasheet download

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Part Number: S3P7324XZZ-QT84

MFG: samsung

Package Cooled: QFP

D/C: 08+

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S3P7335 General Description

The S3C7335 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).

With features such as LCD direct drive capability, 4-channel A/D converter, 8-bit timer/counter, watch timer and PLL frequency synthesizer, it offers you an excellent design solution for a wide variety of applications that require
LCD functions and audio applications.

Up to 56 pins of the 80-pin QFP package, it can be dedicated to I/O. Eight vectored interrupts provide fast response to internal and external events. In addition, the S3C7335's advanced CMOS technology provides for low power consumption and a wide operating voltage range.

S3P7335 Maximum Ratings

Parameter	Symbol	Conditions	Rating	Unit
Supply voltage	V_DD	-	0.3 to +6.5	V
Input voltage	V_IN	Applies to all I/O ports	0.3 to V_DD + 0.3
Output voltage	V_O	-	-0.3 to V_DD + 0.3
Output current high	I_OH	One I/O pin active	15	mA
Output current high	I_OH	All I/O pins active	30
Output current low	I_OL	One I/O pin active	+30(Peak value)
		One I/O pin active	+ 15 (note)
		Total value for output ports	+ 100 (Peak value)
		Total value for output ports	+ 60 *
Operating temperature	T_A	-	40to + 85
Storage temperature	T_STG	-	65 to + 150

NOTE: The values for Output Current Low ( I_OL ) are calculated as Peak Value * Duty .

S3P7335 Features

Memory
` 512-nibble RAM
` 16K-byte ROM

I/O Pins
` Input only: 4 pins
` Output only: 28 pins
` I/O: 24 pins

LCD Controller/Driver
` Maximum 14-digit LCD direct drive capability
` 28 segment x 4 common signals
` Display modes: Static, 1/2 duty (1/2 bias) 1/3 duty (1/2 or 1/3 bias), 1/4 duty (1/3 bias)

8-Bit Basic Timer
` Programmable interval timer functions
` Watch-dog timer function

8-Bit Timer/Counter
` Programmable 8-bit timer
` External event counter
` Arbitrary clock frequency output
` External clock signal divider
` Serial I/O interface clock generator

Watch Timer
` Time interval generation : 0.5 s, 3.9 ms at 32.768 kHz
` Frequency outputs to BUZ pin
` Clock source generation for LCD

8-Bit Serial I/O Interface
` 8-bit transmit/receive mode
` 8-bit receive mode
` Data direction selectable (LSB-first or MSB-first)
` Internal or external clock source

A/D Converter
` 4-channels with 8-bit resolution

Bit Sequential Carrier Buffer
` Support 16-bit serial data transfer in arbitrary format

PLL Frequency Synthesizer
` Level = 300 mVp-p (min)
` AMVCO range = 0.5 MHz to 30 MHz
` FMVCO range = 30 MHz to 150 MHz

16-Bit Intermediate Frequency (IF) Counter
` Level = 300 mVp-p (min)
` AMIF range = 100 kHz to 1 MHz
` FMIF range = 5 MHz to 15 MHz

Interrupts
` Four internal vectored interrupts
` Four external vectored interrupts
` Two quasi-interrupts

Memory-Mapped I/O Structure
` Data memory bank 15

Three Power-Down Modes
` Idle: Only CPU clock stops
` Stop1: Main system or subsystem clock stops
` Stop2: Main system and subsystem clock stop
` CE low: PLL and IFC stop

Oscillation Sources
` Crystal or ceramic oscillator for main system clock
` Crystal for subsystem clock
` Main system clock frequency: 4.5 MHz (Typ)
` Subsystem clock frequency: 32.768 kHz (Typ)
` CPU clock divider circuit (by 4, 8, or 64)

Instruction Execution Times
` 0.9, 1.8, 14.2 ms at 4.5 MHz
` 122 ms at 32.768 kHz (subsystem)

Operating Temperature
` 40 to 85

Operating Voltage Range
` 1.8 V to 5.5 V at 3MHz
` PLL/IFC operation: 2.5V to 3.5V or 4.0V to 5.5V

Package Type
` 80-pin QFP

S3P7335 Connection Diagram

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