RC64474, RC64475, RC64C38C80 Selling Leads, Datasheet
MFG:IDT Package Cooled:N/A D/C:09+
RC64474, RC64475, RC64C38C80 Datasheet download
Part Number: RC64474
MFG: IDT
Package Cooled: N/A
D/C: 09+
RC64474, RC64475, RC64C38C80
- Table of contents:
Info of RC64474
Info of RC64475
Info of RC64C38C80
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About RC64474
PDF/DataSheet Download
Datasheet: RC64474
File Size: 413599 KB
Manufacturer: IDT [Integrated Device Technology]
Download : Click here to Download
About RC64475
PDF/DataSheet Download
Datasheet: RC64475
File Size: 413599 KB
Manufacturer: IDT [Integrated Device Technology]
Download : Click here to Download
About RC60
PDF/DataSheet Download
Datasheet: RC60
File Size: 57029 KB
Manufacturer:
Download : Click here to Download
RC64474 Maximum Ratings
| Symbol | Rating | RC64474/475 3.3V±5% |
RC64474/475 3.3V±5% |
Unit |
| Commercial | Industrial | |||
| VTERM | Terminal Voltage with respect to GND | 0.51 to +4.6 | 0.51 to +4.6 | V |
| TC | Operating Temperature(case) | 0 to +85 | -40 to +85 | |
| TBIAS | Case Temperature Under Bias | 55 to +125 | 55 to +125 | |
| TSTG | Storage Temperature | 55 to +125 | 55 to +125 | |
| IIN | DC Input Current | 202 | 202 | mA |
| IOUT | DC Output Current | 503 | 503 | mA |
RC64474 Features
` High performance 64-bit microprocessor, based on the RISCore4000
Minimized branch and load delays, through streamlined 5-stage scalar pipeline.
Single and double precision floating-point unit
125 peak MFLOP/s at 250 MHz
330 Dhrystone MIPS at 250 MHz
Flexible RC4700-compatible MMU
Joint TLB on-chip, for virtual-to-physical address mapping
`On-chip two-way set associative caches
16KB instruction cache (I-cache)
16KB data cache (D-cache)
`Optional I-cache and D-cache locking (per set), provides improved real-time support
`Enhanced, flexible bus interface allows simple, low-cost design
64-bit Bus Interface option, 1000MB/s bandwidth support
32-bit Bus Interface option, 500MB/s bandwidth support
SDRAM timing protocol, through delayed data in write cycles
RC4000/RC5000 family bus-protocol compatibility
Bus runs at fraction of pipeline clock (1/2 to 1/8)
`Implements MIPS-III Instruction Set Architecture (ISA)
`3.3V core with 3.3V I/O
`Software compatible with entire RISController Series of Embedded Microprocessors
`Industrial temperature range support
` Active power management
Powers down inactive units, through sleep-mode feature
`100% pin compatibility between RC64574, RC64474 and RC4640
`100% pin compatibility between RC64575, RC64475 and RC4650
`RC64474 available in 128-pin QFP package, for 32-bit only systems
`RC64475 available in 208-pin QFP package, for full 64/32 bit systems
`Simplified board-level testing, through full Joint Test Action Group (JTAG) boundary scan
`Windows® CE compliant
Minimized branch and load delays, through streamlined 5-stage scalar pipeline.
Single and double precision floating-point unit
125 peak MFLOP/s at 250 MHz
330 Dhrystone MIPS at 250 MHz
Flexible RC4700-compatible MMU
Joint TLB on-chip, for virtual-to-physical address mapping
`On-chip two-way set associative caches
16KB instruction cache (I-cache)
16KB data cache (D-cache)
`Optional I-cache and D-cache locking (per set), provides improved real-time support
`Enhanced, flexible bus interface allows simple, low-cost design
64-bit Bus Interface option, 1000MB/s bandwidth support
32-bit Bus Interface option, 500MB/s bandwidth support
SDRAM timing protocol, through delayed data in write cycles
RC4000/RC5000 family bus-protocol compatibility
Bus runs at fraction of pipeline clock (1/2 to 1/8)
`Implements MIPS-III Instruction Set Architecture (ISA)
`3.3V core with 3.3V I/O
`Software compatible with entire RISController Series of Embedded Microprocessors
`Industrial temperature range support
` Active power management
Powers down inactive units, through sleep-mode feature
`100% pin compatibility between RC64574, RC64474 and RC4640
`100% pin compatibility between RC64575, RC64475 and RC4650
`RC64474 available in 128-pin QFP package, for 32-bit only systems
`RC64475 available in 208-pin QFP package, for full 64/32 bit systems
`Simplified board-level testing, through full Joint Test Action Group (JTAG) boundary scan
`Windows® CE compliant
RC64475 Maximum Ratings
| Symbol | Rating | RC64474/475 3.3V±5% |
RC64474/475 3.3V±5% |
Unit |
| Commercial | Industrial | |||
| VTERM | Terminal Voltage with respect to GND | 0.51 to +4.6 | 0.51 to +4.6 | V |
| TC | Operating Temperature(case) | 0 to +85 | -40 to +85 | |
| TBIAS | Case Temperature Under Bias | 55 to +125 | 55 to +125 | |
| TSTG | Storage Temperature | 55 to +125 | 55 to +125 | |
| IIN | DC Input Current | 202 | 202 | mA |
| IOUT | DC Output Current | 503 | 503 | mA |
RC64475 Features
` High performance 64-bit microprocessor, based on the RISCore4000
Minimized branch and load delays, through streamlined 5-stage scalar pipeline.
Single and double precision floating-point unit
125 peak MFLOP/s at 250 MHz
330 Dhrystone MIPS at 250 MHz
Flexible RC4700-compatible MMU
Joint TLB on-chip, for virtual-to-physical address mapping
`On-chip two-way set associative caches
16KB instruction cache (I-cache)
16KB data cache (D-cache)
`Optional I-cache and D-cache locking (per set), provides improved real-time support
`Enhanced, flexible bus interface allows simple, low-cost design
64-bit Bus Interface option, 1000MB/s bandwidth support
32-bit Bus Interface option, 500MB/s bandwidth support
SDRAM timing protocol, through delayed data in write cycles
RC4000/RC5000 family bus-protocol compatibility
Bus runs at fraction of pipeline clock (1/2 to 1/8)
`Implements MIPS-III Instruction Set Architecture (ISA)
`3.3V core with 3.3V I/O
`Software compatible with entire RISController Series of Embedded Microprocessors
`Industrial temperature range support
` Active power management
Powers down inactive units, through sleep-mode feature
`100% pin compatibility between RC64574, RC64474 and RC4640
`100% pin compatibility between RC64575, RC64475 and RC4650
`RC64474 available in 128-pin QFP package, for 32-bit only systems
`RC64475 available in 208-pin QFP package, for full 64/32 bit systems
`Simplified board-level testing, through full Joint Test Action Group (JTAG) boundary scan
`Windows® CE compliant
Minimized branch and load delays, through streamlined 5-stage scalar pipeline.
Single and double precision floating-point unit
125 peak MFLOP/s at 250 MHz
330 Dhrystone MIPS at 250 MHz
Flexible RC4700-compatible MMU
Joint TLB on-chip, for virtual-to-physical address mapping
`On-chip two-way set associative caches
16KB instruction cache (I-cache)
16KB data cache (D-cache)
`Optional I-cache and D-cache locking (per set), provides improved real-time support
`Enhanced, flexible bus interface allows simple, low-cost design
64-bit Bus Interface option, 1000MB/s bandwidth support
32-bit Bus Interface option, 500MB/s bandwidth support
SDRAM timing protocol, through delayed data in write cycles
RC4000/RC5000 family bus-protocol compatibility
Bus runs at fraction of pipeline clock (1/2 to 1/8)
`Implements MIPS-III Instruction Set Architecture (ISA)
`3.3V core with 3.3V I/O
`Software compatible with entire RISController Series of Embedded Microprocessors
`Industrial temperature range support
` Active power management
Powers down inactive units, through sleep-mode feature
`100% pin compatibility between RC64574, RC64474 and RC4640
`100% pin compatibility between RC64575, RC64475 and RC4650
`RC64474 available in 128-pin QFP package, for 32-bit only systems
`RC64475 available in 208-pin QFP package, for full 64/32 bit systems
`Simplified board-level testing, through full Joint Test Action Group (JTAG) boundary scan
`Windows® CE compliant
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