NM2380A-AES01, NM24C02, NM24C02EM8 Selling Leads, Datasheet
MFG:NEOMAGIC Package Cooled:QFP64 D/C:00+
NM2380A-AES01, NM24C02, NM24C02EM8 Datasheet download
Part Number: NM2380A-AES01
MFG: NEOMAGIC
Package Cooled: QFP64
D/C: 00+
MFG:NEOMAGIC Package Cooled:QFP64 D/C:00+
NM2380A-AES01, NM24C02, NM24C02EM8 Datasheet download
MFG: NEOMAGIC
Package Cooled: QFP64
D/C: 00+
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PDF/DataSheet Download
Datasheet: NM2002UA10A
File Size: 266303 KB
Manufacturer: ROHM
Download : Click here to Download
PDF/DataSheet Download
Datasheet: NM24C02
File Size: 107053 KB
Manufacturer: FAIRCHILD [Fairchild Semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: NM2002UA10A
File Size: 266303 KB
Manufacturer: ROHM
Download : Click here to Download
The NM24C02/03 devices are 2048 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements. The upper half (upper 1Kbit) of the memory of the NM24C03 can be write protected by connecting the WP pin to VCC. This section of memory then becomes unalterable unless WP is switched to VSS.
This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for example a microprocessor) and the slave EEPROM device(s).
The Standard IIC protocol allows for a maximum of 16K of EEPROM memory which is supported by the Fairchild family in 2K, 4K, 8K, and 16K devices, allowing the user to configure the memory as the application requires with any combination of EEPROMs. In order to implement higher EEPROM memory densities on the IIC bus, the Extended IIC protocol must be used. (Refer to the NM24C32 or NM24C65 datasheets for more information.)
Fairchild EEPROMs are designed and tested for applications requiring high endurance, high reliability and low power consumption.