MX224, MX224P, MX22L16256AT Selling Leads, Datasheet
MFG:MX Package Cooled:PLCC D/C:New
MX224, MX224P, MX22L16256AT Datasheet download
Part Number: MX224
MFG: MX
Package Cooled: PLCC
D/C: New
MFG:MX Package Cooled:PLCC D/C:New
MX224, MX224P, MX22L16256AT Datasheet download
MFG: MX
Package Cooled: PLCC
D/C: New
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PDF/DataSheet Download
Datasheet: MX205Q
File Size: 252911 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: MX205Q
File Size: 252911 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: MX205Q
File Size: 252911 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
The MX214/224 Variable Split Band Inverters are designed for mobile and cellular radio voice security applications. Digital control functions are loaded serially into the MX214. The MX224 is loaded in parallel.
The MX214/224 ICs include a highpass filter that rejects subaudio frequencies, ensuring full CTCSS compatibility. This CTCSS filter is not included on the earlier generation MX204 VSB Inverter.
The MX214/224 splits the voiceband (300-2700Hz) into upper and lower subbands, and inverts each subband about itself. The 'split point' (defined as the frequency where the voice band is subdivided), is externally programmable to 32 distinct values in the 300 to 3000Hz range. In the 'fixed code' mode, a single point is used. Fixed mode operation nets approximately 4 mutually exclusive secure channels.
In 'rolling code' mode, the split point is changed many times per second, usually under control of a microprocessor. Rolling code scrambling requires synchronization, offers higher security than fixed code operation, and provides a much greater number of mutually exclusive secure channels.
The MX214/224 offers a recovered audio product close to that of a telephone. The on-chip ' Mute' function is useful when implementing rolling code continuous synchronization schemes. 'Powersave' and 'Clear/Scramble' controls are also included on-chip. Timing and filter clocks are derived internally from an on-chip 1MHz reference oscillator driven by a 1MHz crystal or clock pulse input.
General | Notes | Min. | Typ. | Max. | Units |
Supply (VDD-VSS) | -0.3 | 7.0 | V | ||
Voltage on any pin to VSS | -0.3 | VDD + 0.3 | V | ||
Current | mA | ||||
VDD | -30 | 30 | mA | ||
VSS | -30 | 30 | mA | ||
Any other pin | -20 | 20 | |||
P/LH Packages | |||||
Total allowable Power issipation at TAMB = 25 |
800 | mW | |||
Derating above 25 | 10 | mW/ above 25 | |||
Operating Temperature | -30 | 70 | |||
Storage Temperature | -40 | 85 | |||
J Package | |||||
Total allowable Power dissipation at TAMB = 25 |
800 | mW | |||
Derating above 25 | 10 | 85 | mW/ above 25 | ||
Operating Temperature | -30 | 125 | |||
Storage Temperature | -55 |