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MSX435E3251F2, MSX4636EUB, MSX532

MSX435E3251F2, MSX4636EUB, MSX532 Selling Leads, Datasheet

MFG:11  Package Cooled:N/A  D/C:N/A

MSX435E3251F2, MSX4636EUB, MSX532 Picture

MSX435E3251F2, MSX4636EUB, MSX532 Datasheet download

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Part Number: MSX435E3251F2

 

MFG: 11

Package Cooled: N/A

D/C: N/A

 

 

 
 
 
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About MSX532

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Datasheet: MSX532

File Size: 694258 KB

Manufacturer: FAIRCHILD [Fairchild Semiconductor]

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About MSX532

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Datasheet: MSX532

File Size: 694258 KB

Manufacturer: FAIRCHILD [Fairchild Semiconductor]

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About MSX532

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Datasheet: MSX532

File Size: 694258 KB

Manufacturer: FAIRCHILD [Fairchild Semiconductor]

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MSX532 General Description

The MSX family of SRAM-based bit-oriented switching devices offer flow-through NRZ data rates of up to 150Mb/s and registered clock frequencies of up to 75MHz. The I/O buffers are individually configurable. The I/O buffers can be connected to each other through the switch matrix, which supports One-to-One and One-to-Many connections.

The proprietary RapidConfigure parallel interface allows fast configuration of both the I/O buffers and switch matrix. It also allows readback of the device for test and verification purposes. The MSX devices also support the industry standard JTAG (IEEE 1149.1) interface for boundary scan testing. The JTAG interface can also be used to download configuration data to the device. A functional block diagram of the MSX architecture is shown in Figure 1.

MSX532 Maximum Ratings

Supply Voltage VDD                            -0.3V to +3.6 V
Supply Voltage (Inputs) VIN
(Note 6)(Note 7)                               -0.3V to +5.5V
Junction Temperature TJ                                +150
Storage Temperature TSTG              -65 to +150
Maximum Power Dissipation PMAX                  10.5W
Electrostatic Discharge ESD (Note 8)              1500V

MSX532 Features

· SRAM-based, in-system programmable
· Configurable I/O Ports
    • Individually programmable as input, output, bi-directional, or Bus Repeater mode
    • Control Signals per I/O port: 2 input enables, 2 output enables, 2 Global Clock inputs and Next Neighbor Clock option
    • Output data inversion: capable of inverting output signals in flow through mode
· Non-blocking switch matrix
    • One-to-One and One-to-Many connections Double-buffered configuration RAM cells for simultaneous global updates
· Registered and flow-through data modes
    • Up to 75 MHz clock frequency in registered mode
    • Up to 150 Mb/s in flow-through mode
· 20 ns propagation delay in flow-through mode
· 8 mA output current
· Dedicated RapidConfigure parallel interface or JTAG serial interface available for configuration and readback of MSX devices
· 3.3V operation, LVTTL I/O's (5V tolerant)
· MSX532 is offered in a 792 TBGA package

MSX532 Typical Application

• Telecom and datacom switching
• Video switches and servers
• Test equipment

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