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MPC9773XAA, MPC9774, MPC9774FA

Table of contents:
Info of MPC9773XAA
Info of MPC9774
Info of MPC9774FA

MPC9773XAA, MPC9774, MPC9774FA Selling Leads, Datasheet

MFG:Freescale Semiconductor Category:Integrated Circuits (ICs) Package Cooled:08+ D/C:1000

MPC9773XAA, MPC9774, MPC9774FA Datasheet download

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Part Number: MPC9773XAA

Category: Integrated Circuits (ICs)

MFG: Freescale Semiconductor

Package Cooled: 08+

D/C: 1000

Description: IC CLOCK GEN 1:14 PLL LV 52-LQFP

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MPC9774 General Description

The MPC9774 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the MPC9774 requires the connection of the PLL feedback output QFB to feedback input FB_IN to close the PLL feedback path. The reference clock frequency and the divider for the feedback path determine the VCO frequency. Both must be selected to match the VCO frequency range.

The MPC9774 features frequency programmability between the three output banks outputs as well as the output to input relationships. Output frequency ratios of 1:1, 2:1, 3:1, 3:2 and 3:2:1 can be realized. Additionally, the device supports a separate configurable feedback output which allows for a wide variety of of input/output frequency multiplication alternatives. The VCO_SEL pin provides an extended PLL input reference frequency range.

The REF_SEL pin selects the internal crystal oscillator or the LVCMOS compatible inputs as the reference clock signal. Two alternative LVCMOS compatible clock inputs are provided for clock redundancy support. The PLL_EN control selects the PLL bypass configuration for test and diagnosis. In this configuration, the selected input reference clock is routed directly to the output dividers bypassing the PLL. The PLL bypass is fully static and the minimum clock frequency specification and all other PLL characteristics do not apply.

The MPC9774 has an internal poweron reset.

The MPC9774 is fully 2.5V and 3.3V compatible and requires no external loop filter components. All inputs (except XTAL) accept LVCMOS signals while the outputs provide LVCMOS compatible levels with the capability to drive terminated 50 W transmission lines. For series terminated transmission lines, each of the MPC9774 outputs can drive one or two traces giving the devices an effective fanout of 1:12. The device is pin and function compatible to the MPC974 and is packaged in a 52-lead LQFP package.

MPC9774 Maximum Ratings

Symbol	Characteristics	Min	Max	Unit	Condition
V_CC	Supply Voltage	-0.3	3.6	V
V_IN	DC Input Voltage	-0.3	V_CC+0.3	V
V_OUT	DC Output Voltage	-0.3	V_CC+0.3	V
I_IN	DC Input Current		±20	mA
I_OUT	DC Output Current		±50	mA
T_S	Storage Temperature	-65	125

a. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not implied.

MPC9774 Features

• 1:14 PLL based low-voltage clock generator
• 2.5V or 3.3V power supply
• Internal poweron reset
• Generates clock signals up to 125 MHz
• Maximum output skew of 300 ps¹
• Two LVCMOS PLL reference clock inputs
• External PLL feedback supports zero-delay capability
• Various feedback and output dividers (see application section)
• Supports up to three individual generated output clock frequencies
• Drives up to 28 clock lines
• Ambient temperature range 0 to +85
• Pin and function compatible to the MPC974

MPC9774 Connection Diagram

MPC9774FA Parameters

Technical/Catalog Information	MPC9774FA
Vendor	Freescale Semiconductor
Category	Integrated Circuits (ICs)
Type	PLL Clock Generator
Voltage - Supply	3.135 V ~ 3.465 V
Number of Outputs	14
Input	LVCMOS
Output	LVCMOS
Frequency-Max	125MHz
Package / Case	52-LQFP
Packaging	Tray
Operating Temperature	0°C ~ 70°C
Lead Free Status	Contains Lead
RoHS Status	RoHS Non-Compliant
Other Names	MPC9774FA MPC9774FA

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