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MC74VHC1G02, MC74VHC1G02DF, MC74VHC1G02DFT2(H3

Table of contents:
Info of MC74VHC1G02
Info of MC74VHC1G02DF
Info of MC74VHC1G02DFT2(H3

MC74VHC1G02, MC74VHC1G02DF, MC74VHC1G02DFT2(H3 Selling Leads, Datasheet

MFG:MOTO Package Cooled:SOT353 D/C:ON

MC74VHC1G02, MC74VHC1G02DF, MC74VHC1G02DFT2(H3 Picture

MC74VHC1G02, MC74VHC1G02DF, MC74VHC1G02DFT2(H3 Datasheet download

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Part Number: MC74VHC1G02

MFG: MOTO

Package Cooled: SOT353

D/C: ON

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MC74VHC1G02 General Description

The MC74VHC1G02 is an advanced high speed CMOS 2input NOR gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.

The MC74VHC1G02 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the MC74VHC1G02 to be used to interface 5 V circuits to 3 V circuits.

MC74VHC1G02 Maximum Ratings

Symbol	Parameter	Value	Unit
V_CC	DC Supply Voltage	0.5 to + 7.0	V
V_IN	DC Input Voltage	0.5 to + 7.0	V
V_OUT	DC Output Voltage V_CC=0 High or Low State	0.5 to + 7.0 0.5 to V_CC +0.5	V
I_IK	Input Diode Current	-20	mA
I_OK	Output Diode Current V_OUT< GND;V_OUT> V_CC	± 20	mA
I_OUT	DC Output Current, per Pin	25	mA
I_CC	DC Supply Current, V_CC and GND	± 25	mA
P_D	Power Dissipation in Still Air SC88A, TSOP5	200	mW
_JA	Thermal Resistance SC88A, TSOP5	333	°C/W
T_L	Lead Temperature, 1 mm from Case for 10 s	260	°C
T_J	Junction Temperature Under Bias	+ 150	°C
T_stg	Storage temperature	65 to +150	°C
V_ESD	ESD Withstand Voltage Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4)	>2000 > 200 N/A	V
I_LATCHUP	LatchUp Performance Above V_CC and Below GND at 125°C (Note 5)	± 500	mA

1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolutemaximumrated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions.
2. Tested to EIA/JESD22A114A
3. Tested to EIA/JESD22A115A
4. Tested to JESD22C101A
5. Tested to EIA/JESD78

MC74VHC1G02 Features

• High Speed: t _PD = 3.0 ns (Typ) at V _CC = 5 V
• Low Power Dissipation: I _CC = 2 A (Max) at T _A = 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 56; Equivalent Gates = 14

MC74VHC1G02 Connection Diagram

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